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Re: [PATCH] MIPS bfd: abi 64 ld -r


Alexandre Oliva wrote:
> On Sep  3, 2002, Thiemo Seufer <ica2_ts@csv.ica.uni-stuttgart.de> wrote:
> 
> >> -  mirela.r_type2 = ELF64_MIPS_R_TYPE2 (src[1].r_info);
> >> +  mirela.r_type2 = ELF64_MIPS_R_TYPE (src[1].r_info);
> >>    mirela.r_ssym = ELF64_MIPS_R_SSYM (src[1].r_info);
> >> -  mirela.r_type3 = ELF64_MIPS_R_TYPE3 (src[2].r_info);
> >> +  mirela.r_type3 = ELF64_MIPS_R_TYPE (src[2].r_info);
> 
> > I don't see how _removing_ the TYPE2/TYPE3 handling can improve things.
> 
> When the triple-relocation encoded in a single r_info is split into a
> sequence of 3 separate relocations, each r_info of the sequence will
> have the relocation number in R_TYPE, instead of being encoded in the
> separate bits that are loaded by R_TYPE[23].

Ah, I see it now. mips_elf64_be_swap_reloc_out() above should be
changed similiarily then.

> >> -	 false,			/* partial_inplace */
> >> +	 true,			/* partial_inplace */
> 
> > It is surely wrong to do partial_inplace with RELA relocations.
> 
> There's nothing wrong about it.

It's wrong to say all RELA relocations will use partial_inplace
(especially if none of them do, AFAIK).

> It's just that it misses part of the
> benefit of using RELA relocations, which is to not be limited by the
> size of the field to store the addend.  Unfortunately, IRIX native
> tools do use partial in-place relocations (and I suspect they're
> actually REL, not RELA),

If you are talking about R_MIPS_HI16 and R_MIPS_LO16, the IRIX tools
actually use REL relocations for them. That's why the backend has
also REL support.

> so doing partial in-place too is not a matter
> of taste, it's a matter of binary compatibility.  We don't have a
> choice.

We have, because the IRIX tools accept their RELA variants, too.

> I don't even understand why we're doing this with RELA.
> To me, that's already a divergence from the behavior of the native
> tools.

The MIPS/SGI n64 ABI Draft deprecates REL in favour of RELA, SGI
doesn't adhere to this fully. Using RELA means we don't have to
require R_MIPS_LO16 to follow immediately after R_MIPS_HI16 or have
to use heuristics otherwise. There's a terse remark about this in
the draft.


Thiemo


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