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[patch] ld patch for tic4x
- From: "Svein E. Seldal" <Svein dot Seldal at solidas dot com>
- To: binutils at sources dot redhat dot com
- Date: Tue, 27 Aug 2002 15:03:10 +0200
- Subject: [patch] ld patch for tic4x
Hi,
This is the ld patch for the tic4x target
Note the author of this code is Michael Hayes, and I've assigned the
ChangeLog entries to him.
Svein
ld/ChangeLog:
2002-08-27 Michael Hayes <m.hayes@elec.canterbury.ac.nz>
* emulparams/tic3xcoff.sh: New file
* emulparams/tic4xcoff.sh: New file
* scripttempl/tic3xcoff.sc: New file
* scripttempl/tic4xcoff.sc: New file
Index: ld/emulparams/tic3xcoff.sh
===================================================================
RCS file: ld/emulparams/tic3xcoff.sh
diff -N ld/emulparams/tic3xcoff.sh
*** /dev/null 1 Jan 1970 00:00:00 -0000
--- ld/emulparams/tic3xcoff.sh 27 Aug 2002 09:08:54 -0000
***************
*** 0 ****
--- 1,9 ----
+ SCRIPT_NAME=tic4xcoff
+ OUTPUT_FORMAT="coff2-c4x"
+ OUTPUT_ARCH="c3x"
+ ARCH=c3x
+ #ENTRY=_c_int00
+ TEXT_START_ADDR=0x0080
+ TARGET_PAGE_SIZE=0x1000
+ TEMPLATE_NAME=ticoff
+ OUTPUT_FORMAT_TEMPLATE=tic4x
Index: ld/emulparams/tic4xcoff.sh
===================================================================
RCS file: ld/emulparams/tic4xcoff.sh
diff -N ld/emulparams/tic4xcoff.sh
*** /dev/null 1 Jan 1970 00:00:00 -0000
--- ld/emulparams/tic4xcoff.sh 27 Aug 2002 09:08:54 -0000
***************
*** 0 ****
--- 1,9 ----
+ SCRIPT_NAME=tic4xcoff
+ OUTPUT_FORMAT="coff2-c4x"
+ OUTPUT_ARCH="c4x"
+ ARCH=c4x
+ #ENTRY=_c_int00
+ TEXT_START_ADDR=0x0080
+ TARGET_PAGE_SIZE=0x1000
+ TEMPLATE_NAME=ticoff
+ OUTPUT_FORMAT_TEMPLATE=tic4x
Index: ld/scripttempl/tic3xcoff.sc
===================================================================
RCS file: ld/scripttempl/tic3xcoff.sc
diff -N ld/scripttempl/tic3xcoff.sc
*** /dev/null 1 Jan 1970 00:00:00 -0000
--- ld/scripttempl/tic3xcoff.sc 27 Aug 2002 09:08:54 -0000
***************
*** 0 ****
--- 1,92 ----
+ # 32 interrupt vectors + 32 trap vectors each of 4 bytes
+ # The .bss and .data sections need to be contiguous for direct addressing
+ # The data page pointer gets loaded with the start of .bss
+ # TI C compiler uses .cinit to initialise variables in .bss
+
+ test -z "$ENTRY" && ENTRY=_start
+ # These are substituted in as variables in order to get '}' in a shell
+ # conditional expansion.
+ INIT='.init : { *(.init) }'
+ FINI='.fini : { *(.fini) }'
+ cat <<EOF
+ OUTPUT_FORMAT("${OUTPUT_FORMAT}")
+ OUTPUT_ARCH("${OUTPUT_ARCH}")
+ ${LIB_SEARCH_DIRS}
+
+ ENTRY(${ENTRY})
+ ${RELOCATING+ __SYSMEM_SIZE = DEFINED(__SYSMEM_SIZE) ? __SYSMEM_SIZE : 0x4000;}
+ ${RELOCATING+ __STACK_SIZE = DEFINED(__STACK_SIZE) ? __STACK_SIZE : 0x1000;}
+
+ SECTIONS
+ {
+ .comms ${RELOCATING+ 64} : {
+ *(.comms)
+ }
+ .bss ${RELOCATING+ SIZEOF(.comms) + ADDR(.comms)} : {
+ ${RELOCATING+ .bss = .;}
+ *(.bss)
+ *(COMMON)
+ ${RELOCATING+ end = .;}
+ ${RELOCATING+ _end = end;}
+ }
+ .data ${RELOCATING+ SIZEOF(.bss) + ADDR(.bss)} :
+ {
+ ${RELOCATING+ .data = .;}
+ *(.data)
+ ${RELOCATING+ edata = .;}
+ }
+ .const ${RELOCATING+ SIZEOF(.data) + ADDR(.data)} :
+ {
+ *(.const)
+ }
+ .cinit ${RELOCATING+ SIZEOF(.const) + ADDR(.const)} :
+ {
+ ${RELOCATING+ cinit = .;}
+ *(.cinit)
+ LONG(0);
+ }
+ .text ${RELOCATING+ SIZEOF(.cinit) + ADDR(.cinit)} : {
+ ${RELOCATING+ .text = .;}
+ ${RELOCATING+ *(.init)}
+ *(.text)
+ ${CONSTRUCTING+ ___CTOR_LIST__ = .;}
+ ${CONSTRUCTING+ LONG(___CTOR_END__ - ___CTOR_LIST__ - 2)}
+ ${CONSTRUCTING+ *(.ctors)}
+ ${CONSTRUCTING+ LONG(0);}
+ ${CONSTRUCTING+ ___CTOR_END__ = .;}
+ ${CONSTRUCTING+ ___DTOR_LIST__ = .;}
+ ${CONSTRUCTING+ LONG(___DTOR_END__ - ___DTOR_LIST__ - 2)}
+ ${CONSTRUCTING+ *(.dtors)}
+ ${CONSTRUCTING+ LONG(0)}
+ ${CONSTRUCTING+ ___DTOR_END__ = .;}
+ ${RELOCATING+ *(.fini)}
+ ${RELOCATING+ etext = .;}
+ ${RELOCATING+ _etext = etext;}
+ }
+ .stack ${RELOCATING+ SIZEOF(.text) + ADDR(.text)} :
+ {
+ *(.stack)
+ ${RELOCATING+ . = . + __STACK_SIZE};
+ }
+ .sysmem ${RELOCATING+ SIZEOF(.stack) + ADDR(.stack)} :
+ {
+ *(.sysmem)
+ }
+ .heap ${RELOCATING+ SIZEOF(.sysmem) + ADDR(.sysmem)} :
+ {
+ ${RELOCATING+ . += __SYSMEM_SIZE - SIZEOF(.sysmem)};
+ }
+ ${RELOCATING- ${INIT}}
+ ${RELOCATING- ${FINI}}
+ .stab 0 ${RELOCATING+(NOLOAD)} :
+ {
+ [ .stab ]
+ }
+ .stabstr 0 ${RELOCATING+(NOLOAD)} :
+ {
+ [ .stabstr ]
+ }
+ /* The TI tools sets cinit to -1 if the ram model is used. */
+ ${RELOCATING+ cinit = SIZEOF(.cinit) == 1 ? cinit : -1;}
+ }
+ EOF
Index: ld/scripttempl/tic4xcoff.sc
===================================================================
RCS file: ld/scripttempl/tic4xcoff.sc
diff -N ld/scripttempl/tic4xcoff.sc
*** /dev/null 1 Jan 1970 00:00:00 -0000
--- ld/scripttempl/tic4xcoff.sc 27 Aug 2002 09:08:54 -0000
***************
*** 0 ****
--- 1,92 ----
+ # 32 interrupt vectors + 32 trap vectors each of 4 bytes
+ # The .bss and .data sections need to be contiguous for direct addressing
+ # The data page pointer gets loaded with the start of .bss
+ # TI C compiler uses .cinit to initialise variables in .bss
+
+ test -z "$ENTRY" && ENTRY=_start
+ # These are substituted in as variables in order to get '}' in a shell
+ # conditional expansion.
+ INIT='.init : { *(.init) }'
+ FINI='.fini : { *(.fini) }'
+ cat <<EOF
+ OUTPUT_FORMAT("${OUTPUT_FORMAT}")
+ OUTPUT_ARCH("${OUTPUT_ARCH}")
+ ${LIB_SEARCH_DIRS}
+
+ ENTRY(${ENTRY})
+ ${RELOCATING+ __SYSMEM_SIZE = DEFINED(__SYSMEM_SIZE) ? __SYSMEM_SIZE : 0x4000;}
+ ${RELOCATING+ __STACK_SIZE = DEFINED(__STACK_SIZE) ? __STACK_SIZE : 0x1000;}
+
+ SECTIONS
+ {
+ .comms ${RELOCATING+ 64} : {
+ *(.comms)
+ }
+ .bss ${RELOCATING+ SIZEOF(.comms) + ADDR(.comms)} : {
+ ${RELOCATING+ .bss = .;}
+ *(.bss)
+ *(COMMON)
+ ${RELOCATING+ end = .;}
+ ${RELOCATING+ _end = end;}
+ }
+ .data ${RELOCATING+ SIZEOF(.bss) + ADDR(.bss)} :
+ {
+ ${RELOCATING+ .data = .;}
+ *(.data)
+ ${RELOCATING+ edata = .;}
+ }
+ .const ${RELOCATING+ SIZEOF(.data) + ADDR(.data)} :
+ {
+ *(.const)
+ }
+ .cinit ${RELOCATING+ SIZEOF(.const) + ADDR(.const)} :
+ {
+ ${RELOCATING+ cinit = .;}
+ *(.cinit)
+ LONG(0);
+ }
+ .text ${RELOCATING+ SIZEOF(.cinit) + ADDR(.cinit)} : {
+ ${RELOCATING+ .text = .;}
+ ${RELOCATING+ *(.init)}
+ *(.text)
+ ${CONSTRUCTING+ ___CTOR_LIST__ = .;}
+ ${CONSTRUCTING+ LONG(___CTOR_END__ - ___CTOR_LIST__ - 2)}
+ ${CONSTRUCTING+ *(.ctors)}
+ ${CONSTRUCTING+ LONG(0);}
+ ${CONSTRUCTING+ ___CTOR_END__ = .;}
+ ${CONSTRUCTING+ ___DTOR_LIST__ = .;}
+ ${CONSTRUCTING+ LONG(___DTOR_END__ - ___DTOR_LIST__ - 2)}
+ ${CONSTRUCTING+ *(.dtors)}
+ ${CONSTRUCTING+ LONG(0)}
+ ${CONSTRUCTING+ ___DTOR_END__ = .;}
+ ${RELOCATING+ *(.fini)}
+ ${RELOCATING+ etext = .;}
+ ${RELOCATING+ _etext = etext;}
+ }
+ .stack ${RELOCATING+ SIZEOF(.text) + ADDR(.text)} :
+ {
+ *(.stack)
+ ${RELOCATING+ . = . + __STACK_SIZE};
+ }
+ .sysmem ${RELOCATING+ SIZEOF(.stack) + ADDR(.stack)} :
+ {
+ *(.sysmem)
+ }
+ .heap ${RELOCATING+ SIZEOF(.sysmem) + ADDR(.sysmem)} :
+ {
+ ${RELOCATING+ . += __SYSMEM_SIZE - SIZEOF(.sysmem)};
+ }
+ ${RELOCATING- ${INIT}}
+ ${RELOCATING- ${FINI}}
+ .stab 0 ${RELOCATING+(NOLOAD)} :
+ {
+ [ .stab ]
+ }
+ .stabstr 0 ${RELOCATING+(NOLOAD)} :
+ {
+ [ .stabstr ]
+ }
+ /* The TI tools sets cinit to -1 if the ram model is used. */
+ ${RELOCATING+ cinit = SIZEOF(.cinit) == 1 ? cinit : -1;}
+ }
+ EOF