This is the mail archive of the binutils@sources.redhat.com mailing list for the binutils project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: MIPS ABI- Dead end functions


On Tuesday 30 July 2002 13:35, Eric Christopher wrote:
> > > So..., how can this situation be handled cleanly?  The cleanest
> > > way I can think of is to modify gcc so that it does not
> > > generate the .cpload $25 sequence in the case that $gp is
> > > unused.  What do you think?
> >
> > Yes, that's the way to go. You may talk with Graeme Peterson
> > about it, his RFC for QNX PIC addresses this issue, too.
>
> This is good. I've been busy and unable to comment on Graeme's work
> so far. One thing that would help a lot is to stop gcc from
> emitting macro instructions as well.

Yes, I was just reading his message this morning with great interest 
after I posted my message.  (Just recently subscribed to binutils)  
The ABI for QNX certainly seems interesting, and does address some 
problems with the present ABI (SVR4?).  It would be nice if it were 
possible to distinguish and use non-gp relocated bl calls for the 
intra-binary calls, but with only 20 bits worth of reach there, it 
seems a tricky proposition.  (I've done some work with that along 
with Jay Carlson in the past with the SNOW ABI, which was statically 
linked shared libraries, the difference was somewhere between 20 and 
30% size reduction, but library updates were way too painfull)

Graeme-
1) Do you have any numbers on code size reduction with the mixed 
non-pic/pic qnx ABI?
2) Within a shared library, do you use gp (or s7) style relocations 
for function calls within a library, or do you use bl as well in that 
case?  (Whats the right word for that..., weak symbol?, override?, 
like malloc in efence)
3) Is there any increase in size on the shared libraries due to the 
extended cpload macro in an inter-call/global data case?
4) Sounds like you removed the load delay constraints, how did you 
implement that?, is it per-architecture smart?  I have the same issue 
here as well, my architecture doesn't require a nop in a load-delay 
slot, even though there is a stall if you use the register in the 
delay slot.  GCCs' scheduler is smart enough in many cases to fill 
that with something else, but when there is nothing else, a nop is 
inserted.  (I haven't finished looking at that, but I think it may be 
something in binutils)

(Sorry, I realize that I'm not being all that helpfull in your quest 
of mainline acceptance Graeme, I'm just interested in the details of 
the ABI, also I don't want to step on eachothers work since I'm 
planning on going into some of those same issues)

Thanks,
Shane Nay.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]