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Re: RFC & patch: Rework MIPS command-line handling
- From: "Maciej W. Rozycki" <macro at ds2 dot pg dot gda dot pl>
- To: Thiemo Seufer <ica2_ts at csv dot ica dot uni-stuttgart dot de>
- Cc: cgd at broadcom dot com, Richard Sandiford <rsandifo at redhat dot com>, gcc-patches at gcc dot gnu dot org, binutils at sources dot redhat dot com
- Date: Tue, 16 Jul 2002 12:54:32 +0200 (MET DST)
- Subject: Re: RFC & patch: Rework MIPS command-line handling
- Organization: Technical University of Gdansk
On Mon, 15 Jul 2002, Thiemo Seufer wrote:
> Note that the MIPS II is a deviation from stock o32 ABI, the
> linux-mips kernel emulates the necessary instructions on MIPS I
> hardware. This means we have an o32-linux ABI there.
Does it? I haven't seen any code to emulate trap, branch likely, dword
coprocessor transfer instructions. What is emulated are only the ll and
sc instructions, but they are only a small subset of MIPS II extensions
which is never used by gcc, unlike the others.
> > If they're using mipsisa64sb1-linux, they probably expect built-in
> > support for, say, MIPS-3D, MDMX .ob, and the few SB-1 extensions as
> > well, regardless of the ABI they choose on the command line.
>
> If all of the hardware for this target supports these, ok.
> But the ISA pre-selection should then be done in the target specific
> code and not globally.
If a target triplet defines a CPU, it should always be used as the
default for uniformity.
--
+ Maciej W. Rozycki, Technical University of Gdansk, Poland +
+--------------------------------------------------------------+
+ e-mail: macro@ds2.pg.gda.pl, PGP key available +