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[PATCH] MIPS gas ASE option handling cleanup
- From: Thiemo Seufer <ica2_ts at csv dot ica dot uni-stuttgart dot de>
- To: binutils at sources dot redhat dot com
- Date: Sat, 1 Jun 2002 22:04:41 +0200
- Subject: [PATCH] MIPS gas ASE option handling cleanup
Hi All,
this unifies the style of ASE option handling and does some related
code cleanup.
Thiemo
2002-06-01 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
/gas/ChangeLog
* config/tc-mips.c (mips_opts): Fix comment, all ASE fields are set
to -1.
(file_ase_mips16): New veriable.
(mips_eabi64): Remove.
(CPU_HAS_MIPS16): New define.
(CPU_HAS_MDMX): Fix data type.
(md_begin): Code cleanup. Use file_ase_mips16.
(mips_elf_final_processing): Handle mips16 header flag.
Handle EABI flag without intermediate variable.
diff -BurpNX /bigdisk/src/binutils-exclude source-orig/gas/config/tc-mips.c source/gas/config/tc-mips.c
--- source-orig/gas/config/tc-mips.c Fri May 31 04:31:10 2002
+++ source/gas/config/tc-mips.c Fri May 31 20:56:30 2002
@@ -185,7 +186,7 @@ static int file_mips_gp32 = -1;
static int file_mips_fp32 = -1;
/* This is the struct we use to hold the current set of options. Note
- that we must set the isa field to ISA_UNKNOWN and the mips16 field to
+ that we must set the isa field to ISA_UNKNOWN and the ASE fields to
-1 to indicate that they have not been initialized. */
static struct mips_set_options mips_opts =
@@ -202,6 +203,10 @@ unsigned long mips_cprmask[4];
/* MIPS ISA we are using for this output file. */
static int file_mips_isa = ISA_UNKNOWN;
+/* True if -mips16 was passed or implied by arguments passed on the
+ command line (e.g., by -march). */
+static int file_ase_mips16;
+
/* True if -mips3d was passed or implied by arguments passed on the
command line (e.g., by -march). */
static int file_ase_mips3d;
@@ -220,9 +225,6 @@ static int mips_arch = CPU_UNKNOWN;
are optimizing. */
static int mips_tune = CPU_UNKNOWN;
-/* Whether we should mark the file EABI64 or EABI32. */
-static int mips_eabi64 = 0;
-
/* If they asked for mips1 or mips2 and a cpu that is
mips3 or greater, then mark the object file 32BITMODE. */
static int mips_32bitmode = 0;
@@ -276,12 +278,16 @@ static int mips_32bitmode = 0;
#define HAVE_64BIT_ADDRESSES (! HAVE_32BIT_ADDRESSES)
+/* Return true if the given CPU supports the MIPS16 ASE. */
+#define CPU_HAS_MIPS16(cpu) \
+ (strncmp (TARGET_CPU, "mips16", sizeof ("mips16") - 1) == 0)
+
/* Return true if the given CPU supports the MIPS3D ASE. */
#define CPU_HAS_MIPS3D(cpu) ((cpu) == CPU_SB1 \
)
/* Return true if the given CPU supports the MDMX ASE. */
-#define CPU_HAS_MDMX(cpu) (0 \
+#define CPU_HAS_MDMX(cpu) (false \
)
/* Whether the processor uses hardware interlocks to protect
@@ -1039,8 +1054,6 @@ md_begin ()
const char *cpu;
char *a = NULL;
int broken = 0;
- int mips_isa_from_cpu;
- int target_cpu_had_mips16 = 0;
const struct mips_cpu_info *ci;
/* GP relative stuff not working for PE */
@@ -1061,15 +1074,6 @@ md_begin ()
cpu = a;
}
- if (strncmp (cpu, "mips16", sizeof "mips16" - 1) == 0)
- {
- target_cpu_had_mips16 = 1;
- cpu += sizeof "mips16" - 1;
- }
-
- if (mips_opts.mips16 < 0)
- mips_opts.mips16 = target_cpu_had_mips16;
-
/* Backward compatibility for historic -mcpu= option. Check for
incompatible options, warn if -mcpu is used. */
if (mips_cpu != CPU_UNKNOWN
@@ -1216,9 +1220,14 @@ md_begin ()
if (mips_tune == CPU_UNKNOWN)
mips_tune = mips_arch;
+ /* If they asked for mips1 or mips2 and a cpu that is
+ mips3 or greater, then mark the object file 32BITMODE. */
ci = mips_cpu_info_from_cpu (mips_arch);
assert (ci != NULL);
- mips_isa_from_cpu = ci->isa;
+ if (ci->isa != ISA_UNKNOWN
+ && ! ISA_HAS_64BIT_REGS (mips_opts.isa)
+ && ISA_HAS_64BIT_REGS (ci->isa))
+ mips_32bitmode = 1;
/* End of TARGET_CPU processing, get rid of malloced memory
if necessary. */
@@ -1232,26 +1241,16 @@ md_begin ()
if (mips_opts.isa == ISA_MIPS1 && mips_trap)
as_bad (_("trap exception not supported at ISA 1"));
- /* Set the EABI kind based on the ISA before the user gets
- to change the ISA with directives. This isn't really
- the best, but then neither is basing the abi on the isa. */
- if (ISA_HAS_64BIT_REGS (mips_opts.isa)
- && mips_opts.abi == EABI_ABI)
- mips_eabi64 = 1;
-
- /* If they asked for mips1 or mips2 and a cpu that is
- mips3 or greater, then mark the object file 32BITMODE. */
- if (mips_isa_from_cpu != ISA_UNKNOWN
- && ! ISA_HAS_64BIT_REGS (mips_opts.isa)
- && ISA_HAS_64BIT_REGS (mips_isa_from_cpu))
- mips_32bitmode = 1;
-
/* If the selected architecture includes support for ASEs, enable
generation of code for them. */
- if (mips_opts.ase_mips3d == -1 && CPU_HAS_MIPS3D (mips_arch))
- mips_opts.ase_mips3d = 1;
- if (mips_opts.ase_mdmx == -1 && CPU_HAS_MDMX (mips_arch))
- mips_opts.ase_mdmx = 1;
+ if (mips_opts.mips16 == -1)
+ mips_opts.mips16 = (CPU_HAS_MIPS16 (mips_arch)) ? 1 : 0;
+
+ if (mips_opts.ase_mips3d == -1)
+ mips_opts.ase_mips3d = (CPU_HAS_MIPS3D (mips_arch)) ? 1 : 0;
+
+ if (mips_opts.ase_mdmx == -1)
+ mips_opts.ase_mdmx = (CPU_HAS_MDMX (mips_arch)) ? 1 : 0;
if (! bfd_set_arch_mach (stdoutput, bfd_arch_mips, mips_arch))
as_warn (_("Could not set architecture and machine"));
@@ -1263,6 +1262,7 @@ md_begin ()
file_mips_isa = mips_opts.isa;
file_mips_abi = mips_opts.abi;
+ file_ase_mips16 = mips_opts.mips16;
file_ase_mips3d = mips_opts.ase_mips3d;
file_ase_mdmx = mips_opts.ase_mdmx;
mips_opts.gp32 = file_mips_gp32;
@@ -13156,6 +13161,9 @@ mips_elf_final_processing ()
elf_elfheader (stdoutput)->e_flags |= EF_MIPS_PIC;
/* Set MIPS ELF flags for ASEs. */
+ if (file_ase_mips16)
+ elf_elfheader (stdoutput)->e_flags |= EF_MIPS_ARCH_ASE_M16;
+
#if 0 /* XXX FIXME */
if (file_ase_mips3d)
elf_elfheader (stdoutput)->e_flags |= ???;
@@ -13172,7 +13181,9 @@ mips_elf_final_processing ()
elf_elfheader (stdoutput)->e_flags |= E_MIPS_ABI_O64;
else if (file_mips_abi == EABI_ABI)
{
- if (mips_eabi64)
+ /* Set the EABI kind based on the ISA. This isn't really
+ the best, but then neither is basing the abi on the isa. */
+ if (ISA_HAS_64BIT_REGS (file_mips_isa))
elf_elfheader (stdoutput)->e_flags |= E_MIPS_ABI_EABI64;
else
elf_elfheader (stdoutput)->e_flags |= E_MIPS_ABI_EABI32;