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Re: ssnop for mips
"Ralf Baechle" <ralf@uni-koblenz.de> writes:
> > > * mips-opc.c (ssnop): While the documentation makes it seem
> > > like this instruction is new for MIPS32, it is not, it is needed
> > > on all ISA levels.
> >
> > for some value of 'needed'. it may have some absolutely different
> > 'no-op' meaning on non-MIPS32/MIPS64 processors.
> >
> > if i recall correctly, that instruction doesn't inhibit multi-issue.
>
> Ssnop is documented as ``breaks superscalar dispatch''. See also the
> comments in IRIX <sys/asm.h> which I can't paste here for (C) reasons.
As noted, i forgot some words there. specifically, "on the rm7k"
though there may well be certain other processors on which it doesn't
force single-issue as well.
(looks like on some of the IDT parts you can still co-issue FP
instructions.)
> > Personally, I don't think it should be enabled if not MIPS32/MIPS64:
> >
> > * the behaviour may not be what's expected, and
>
> All CPUs that don't implement ssnop's special semantics will decode it as
> sll $zero, $zero, 1 which is obviously harmless.
Right, but looked at the other way, it's not.
you see ssnop in the assembly code, and you think "ahh, one per
cycle."
but in fact that's not the case for a bunch of parts.
chris