This is the mail archive of the
binutils@sources.redhat.com
mailing list for the binutils project.
Re: FYI: -march/-mcpu patch for mips
On Fri, Jun 22, 2001 at 06:02:38PM -0700, Eric Christopher wrote:
> On 22 Jun 2001 14:16:22 -0700, H . J . Lu wrote:
> > Here is a patch I have been using to add -march/-mcpu for mips. But it
> > only works with my -march/-mcpu patch for binutils. I didn't submit
> > them since they have to be installed together. My Linux mips toolchain
> > has the -march/-mcpu gcc/binutils patches.
> >
>
> Can you submit the binutils portion of the patch? I"ll finish up gcc
> here if you can submit the binutils portion. That way we can get them
> both installed at the same time.
>
Here it is.
H.J.
----
2001-06-09 H.J. Lu <hjl@gnu.org>
* bfd/elf32-mips.c (_bfd_mips_elf_final_write_processing):
Handle bfd_mach_mips4400, bfd_mach_mips4600, bfd_mach_mips5000
and bfd_mach_mips10000.
* config/tc-mips.c (mips_arch): New. Use mips_arch instead
of mips_cpu for the ISA selection.
(md_longopts): Add OPTION_MARCH.
(md_parse_option): Handle OPTION_MARCH.
* gas/mips/break20.d: Use -march instead of -mcpu for as.
* gas/mips/elf_e_flags2.d: Likewise.
* gas/mips/elf_e_flags3.d: Likewise.
* gas/mips/elf_e_flags4.d: Likewise.
* gas/mips/ld.d: Likewise.
* gas/mips/mips4010.d: Likewise.
* gas/mips/mips4100.d: Likewise.
* gas/mips/mips4650.d: Likewise.
* gas/mips/mips4650.d: Likewise.
* gas/mips/trap20.d: Likewise.
--- binutils/bfd/elf32-mips.c.march Thu Jun 7 10:40:00 2001
+++ binutils/bfd/elf32-mips.c Fri Jun 8 23:49:59 2001
@@ -2371,6 +2371,8 @@ _bfd_mips_elf_final_write_processing (ab
case bfd_mach_mips4000:
case bfd_mach_mips4300:
+ case bfd_mach_mips4400:
+ case bfd_mach_mips4600:
val = E_MIPS_ARCH_3;
break;
@@ -2390,6 +2392,7 @@ _bfd_mips_elf_final_write_processing (ab
val = E_MIPS_ARCH_3 | E_MIPS_MACH_4650;
break;
+ case bfd_mach_mips5000:
case bfd_mach_mips8000:
case bfd_mach_mips10000:
case bfd_mach_mips12000:
--- binutils/gas/config/tc-mips.c.march Fri Jun 8 22:36:51 2001
+++ binutils/gas/config/tc-mips.c Fri Jun 8 23:51:18 2001
@@ -206,9 +206,14 @@ unsigned long mips_cprmask[4];
/* MIPS ISA we are using for this output file. */
static int file_mips_isa = ISA_UNKNOWN;
-/* The CPU type we are using for this output file. */
+/* The argument of the -mcpu= flag. The CPU type we are schduling for
+ this output file. */
static int mips_cpu = CPU_UNKNOWN;
+/* The argument of the -march= flag. The CPU type we are using for
+ this output file. */
+static int mips_arch = CPU_UNKNOWN;
+
/* The argument of the -mabi= flag. */
static char * mips_abi_string = 0;
@@ -269,7 +274,14 @@ static int mips_gp32 = 0;
So now, at least, -mcpu=FOO and -mFOO are exactly equivalent.
- -- Jim Blandy <jimb@cygnus.com> */
+ -- Jim Blandy <jimb@cygnus.com>
+
+ Add -march=FOO to generate code that will only run on a FOO. It is
+ ok to schedule it for something else as long as they are compatible
+ with each other.
+
+ --- H.J. <hjl@gnu.org> */
+
#define hilo_interlocks (mips_cpu == CPU_R4010 \
)
@@ -957,40 +969,43 @@ md_begin ()
if (mips_opts.mips16 < 0)
mips_opts.mips16 = target_cpu_had_mips16;
- /* At this point, mips_cpu will either be CPU_UNKNOWN if no CPU was
+ /* At this point, mips_arch will either be CPU_UNKNOWN if no ARCH was
specified on the command line, or some other value if one was.
Similarly, mips_opts.isa will be ISA_UNKNOWN if not specified on
the command line, or will be set otherwise if one was. */
- if (mips_cpu != CPU_UNKNOWN && mips_opts.isa != ISA_UNKNOWN)
+ if (mips_arch != CPU_UNKNOWN && mips_opts.isa != ISA_UNKNOWN)
{
/* We have it all. There's nothing to do. */
}
- else if (mips_cpu != CPU_UNKNOWN && mips_opts.isa == ISA_UNKNOWN)
+ else if (mips_arch != CPU_UNKNOWN && mips_opts.isa == ISA_UNKNOWN)
{
- /* We have CPU, we need ISA. */
- ci = mips_cpu_info_from_cpu (mips_cpu);
+ /* We have ARCH, we need ISA. */
+ ci = mips_cpu_info_from_cpu (mips_arch);
assert (ci != NULL);
mips_opts.isa = ci->isa;
}
- else if (mips_cpu == CPU_UNKNOWN && mips_opts.isa != ISA_UNKNOWN)
+ else if (mips_arch == CPU_UNKNOWN && mips_opts.isa != ISA_UNKNOWN)
{
- /* We have ISA, we need default CPU. */
+ /* We have ISA, we need default ARCH. */
ci = mips_cpu_info_from_isa (mips_opts.isa);
assert (ci != NULL);
- mips_cpu = ci->cpu;
+ mips_arch = ci->cpu;
}
else
{
- /* We need to set both ISA and CPU from target cpu. */
+ /* We need to set both ISA and ARCH from target cpu. */
ci = mips_cpu_info_from_name (cpu);
if (ci == NULL)
ci = mips_cpu_info_from_cpu (CPU_R3000);
assert (ci != NULL);
mips_opts.isa = ci->isa;
- mips_cpu = ci->cpu;
+ mips_arch = ci->cpu;
}
- ci = mips_cpu_info_from_cpu (mips_cpu);
+ if (mips_cpu == CPU_UNKNOWN)
+ mips_cpu = mips_arch;
+
+ ci = mips_cpu_info_from_cpu (mips_arch);
assert (ci != NULL);
mips_isa_from_cpu = ci->isa;
@@ -1021,7 +1036,7 @@ md_begin ()
&& ISA_HAS_64BIT_REGS (mips_isa_from_cpu))
mips_32bitmode = 1;
- if (! bfd_set_arch_mach (stdoutput, bfd_arch_mips, mips_cpu))
+ if (! bfd_set_arch_mach (stdoutput, bfd_arch_mips, mips_arch))
as_warn (_("Could not set architecture and machine"));
file_mips_isa = mips_opts.isa;
@@ -2498,9 +2513,9 @@ macro_build (place, counter, ep, name, f
{
if (strcmp (fmt, insn.insn_mo->args) == 0
&& insn.insn_mo->pinfo != INSN_MACRO
- && OPCODE_IS_MEMBER (insn.insn_mo, mips_opts.isa, mips_cpu,
+ && OPCODE_IS_MEMBER (insn.insn_mo, mips_opts.isa, mips_arch,
mips_gp32)
- && (mips_cpu != CPU_R4650 || (insn.insn_mo->pinfo & FP_D) == 0))
+ && (mips_arch != CPU_R4650 || (insn.insn_mo->pinfo & FP_D) == 0))
break;
++insn.insn_mo;
@@ -4850,7 +4865,7 @@ macro (ip)
lr = 1;
goto ld;
case M_LDC1_AB:
- if (mips_cpu == CPU_R4650)
+ if (mips_arch == CPU_R4650)
{
as_bad (_("opcode not supported on this processor"));
return;
@@ -4939,7 +4954,7 @@ macro (ip)
s = "scd";
goto st;
case M_SDC1_AB:
- if (mips_cpu == CPU_R4650)
+ if (mips_arch == CPU_R4650)
{
as_bad (_("opcode not supported on this processor"));
return;
@@ -5427,7 +5442,7 @@ macro (ip)
}
case M_L_DOB:
- if (mips_cpu == CPU_R4650)
+ if (mips_arch == CPU_R4650)
{
as_bad (_("opcode not supported on this processor"));
return;
@@ -5468,7 +5483,7 @@ macro (ip)
* But, the resulting address is the same after relocation so why
* generate the extra instruction?
*/
- if (mips_cpu == CPU_R4650)
+ if (mips_arch == CPU_R4650)
{
as_bad (_("opcode not supported on this processor"));
return;
@@ -5486,7 +5501,7 @@ macro (ip)
goto ldd_std;
case M_S_DAB:
- if (mips_cpu == CPU_R4650)
+ if (mips_arch == CPU_R4650)
{
as_bad (_("opcode not supported on this processor"));
return;
@@ -6115,7 +6130,7 @@ macro2 (ip)
break;
case M_S_DOB:
- if (mips_cpu == CPU_R4650)
+ if (mips_arch == CPU_R4650)
{
as_bad (_("opcode not supported on this processor"));
return;
@@ -7086,14 +7101,14 @@ mips_ip (str, ip)
assert (strcmp (insn->name, str) == 0);
- if (OPCODE_IS_MEMBER (insn, mips_opts.isa, mips_cpu, mips_gp32))
+ if (OPCODE_IS_MEMBER (insn, mips_opts.isa, mips_arch, mips_gp32))
ok = true;
else
ok = false;
if (insn->pinfo != INSN_MACRO)
{
- if (mips_cpu == CPU_R4650 && (insn->pinfo & FP_D) != 0)
+ if (mips_arch == CPU_R4650 && (insn->pinfo & FP_D) != 0)
ok = false;
}
@@ -7112,7 +7127,7 @@ mips_ip (str, ip)
static char buf[100];
sprintf (buf,
_("opcode not supported on this processor: %s (%s)"),
- mips_cpu_to_str (mips_cpu),
+ mips_cpu_to_str (mips_arch),
mips_isa_to_str (mips_opts.isa));
insn_error = buf;
@@ -8943,6 +8958,8 @@ struct option md_longopts[] =
{"mips5", no_argument, NULL, OPTION_MIPS5},
#define OPTION_MIPS64 (OPTION_MD_BASE + 30)
{"mips64", no_argument, NULL, OPTION_MIPS64},
+#define OPTION_MARCH (OPTION_MD_BASE + 31)
+ {"march", required_argument, NULL, OPTION_MARCH},
#ifdef OBJ_ELF
#define OPTION_ELF_BASE (OPTION_MD_BASE + 35)
#define OPTION_CALL_SHARED (OPTION_ELF_BASE + 0)
@@ -9044,20 +9061,31 @@ md_parse_option (c, arg)
mips_opts.isa = ISA_MIPS64;
break;
+ case OPTION_MARCH:
case OPTION_MCPU:
{
+ int cpu = CPU_UNKNOWN;
+
/* Identify the processor type. */
- if (strcasecmp (arg, "default") == 0)
- mips_cpu = CPU_UNKNOWN;
- else
+ if (strcasecmp (arg, "default") != 0)
{
const struct mips_cpu_info *ci;
ci = mips_cpu_info_from_name (arg);
if (ci == NULL || ci->is_isa)
- as_bad (_("invalid architecture -mcpu=%s"), arg);
+ as_fatal (_("invalid architecture -march/mcpu=%s"), arg);
else
- mips_cpu = ci->cpu;
+ cpu = ci->cpu;
+ }
+
+ switch (c)
+ {
+ case OPTION_MARCH:
+ mips_arch = cpu;
+ break;
+ case OPTION_MCPU:
+ mips_cpu = cpu;
+ break;
}
}
break;
--- binutils/gas/testsuite/gas/mips/break20.d.march Thu Jun 3 11:02:03 1999
+++ binutils/gas/testsuite/gas/mips/break20.d Fri Jun 8 23:49:59 2001
@@ -1,4 +1,4 @@
-#as: -mcpu=r3900
+#as: -march=r3900
#objdump: -dr --prefix-addresses -mmips:3900
#name: MIPS 20-bit break
@@ -15,4 +15,4 @@ Disassembly of section .text:
0+001c <[^>]*> sdbbp 0x14
0+0020 <[^>]*> sdbbp 0x14,0x28
0+0024 <[^>]*> sdbbp 0x3ff,0x3ff
- ...
\ No newline at end of file
+ ...
--- binutils/gas/testsuite/gas/mips/elf_e_flags2.d.march Mon May 21 10:41:00 2001
+++ binutils/gas/testsuite/gas/mips/elf_e_flags2.d Fri Jun 8 23:49:59 2001
@@ -1,6 +1,6 @@
-# name: ELF e_flags: -m4650
+# name: ELF e_flags: -m4650 -march=4650
# source: elf_e_flags.s
-# as: -m4650
+# as: -m4650 -march=4650
# objdump: -fd
.*:.*file format.*mips.*
--- binutils/gas/testsuite/gas/mips/elf_e_flags3.d.march Mon May 21 10:41:00 2001
+++ binutils/gas/testsuite/gas/mips/elf_e_flags3.d Fri Jun 8 23:49:59 2001
@@ -1,6 +1,6 @@
-# name: ELF e_flags: -mcpu=4650
+# name: ELF e_flags: -march=4650
# source: elf_e_flags.s
-# as: -mcpu=4650
+# as: -march=4650
# objdump: -fd
.*:.*file format.*mips.*
--- binutils/gas/testsuite/gas/mips/elf_e_flags4.d.march Mon May 21 10:41:00 2001
+++ binutils/gas/testsuite/gas/mips/elf_e_flags4.d Fri Jun 8 23:49:59 2001
@@ -1,6 +1,6 @@
-# name: ELF e_flags: -m4650 -mcpu=4650
+# name: ELF e_flags: -m4650 -march=4650
# source: elf_e_flags.s
-# as: -m4650 -mcpu=4650
+# as: -m4650 -march=4650
# objdump: -fd
.*:.*file format.*mips.*
--- binutils/gas/testsuite/gas/mips/ld.d.march Mon May 21 10:41:00 2001
+++ binutils/gas/testsuite/gas/mips/ld.d Fri Jun 8 23:49:59 2001
@@ -1,5 +1,5 @@
#objdump: -dr --prefix-addresses -mmips:4000
-#as: -mcpu=r4000
+#as: -march=r4000
#name: MIPS ld
# Test the ld macro.
--- binutils/gas/testsuite/gas/mips/lineno.d.march Tue Mar 27 15:57:25 2001
+++ binutils/gas/testsuite/gas/mips/lineno.d Fri Jun 8 23:49:59 2001
@@ -1,6 +1,6 @@
#objdump: -d -l -mmips:4000
#name: assembly line numbers
-#as: -g -mcpu=r4000
+#as: -g -march=r4000
.*: +file format .*mips.*
--- binutils/gas/testsuite/gas/mips/mips4010.d.march Mon May 21 10:41:06 2001
+++ binutils/gas/testsuite/gas/mips/mips4010.d Fri Jun 8 23:49:59 2001
@@ -1,6 +1,6 @@
#objdump: -dr --prefix-addresses -mmips:4010
#name: MIPS 4010
-#as: -mcpu=4010
+#as: -march=4010
.*: +file format .*mips.*
--- binutils/gas/testsuite/gas/mips/mips4100.d.march Mon May 21 10:41:06 2001
+++ binutils/gas/testsuite/gas/mips/mips4100.d Fri Jun 8 23:49:59 2001
@@ -1,6 +1,6 @@
#objdump: -dr --prefix-addresses -mmips:4100
#name: MIPS 4100
-#as: -mcpu=4100
+#as: -march=4100
.*: +file format .*mips.*
--- binutils/gas/testsuite/gas/mips/mips4650.d.march Mon May 21 10:41:06 2001
+++ binutils/gas/testsuite/gas/mips/mips4650.d Fri Jun 8 23:49:59 2001
@@ -1,6 +1,6 @@
#objdump: -dr --prefix-addresses -mmips:4650
#name: MIPS 4650
-#as: -mcpu=4650
+#as: -march=4650
.*: +file format .*mips.*
--- binutils/gas/testsuite/gas/mips/trap20.d.march Mon May 21 10:41:06 2001
+++ binutils/gas/testsuite/gas/mips/trap20.d Fri Jun 8 23:49:59 2001
@@ -1,4 +1,4 @@
-#as: -mcpu=r4000
+#as: -march=r4000
#objdump: -dr --prefix-addresses -mmips:4000
#name: MIPS 20-bit trap