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Re: [PATCH] Performance counter opcodes for MIPS R1[02]000
- To: cgd at sibyte dot com
- Subject: Re: [PATCH] Performance counter opcodes for MIPS R1[02]000
- From: Thiemo Seufer <ica2_ts at csv dot ica dot uni-stuttgart dot de>
- Date: Thu, 21 Jun 2001 07:45:56 +0200
- Cc: binutils at sources dot redhat dot com
cgd@sibyte.com wrote:
[snip]
> The selection of t0 for that register name, for a binary unmarked with
> ABI, is a change, and I don't understand why it's correct.
Ah, now I understand Your concern. I wasn't aware of the fact that
there are unmarked binaries. I thought the use of ABI-flags was
mandatory in ELF.
[snip]
> There are fields for such markings, e.g. in flags:
>
> /* Code in file uses new ABI (-n32 on Irix 6). */
> #define EF_MIPS_ABI2 0x00000020
[snip]
> What your change does is change the disassembly of that case -- for no
> reason that i've been able to discern. Maybe i'm just missing it in
> your explanations...
In contrary, I had missed Your point.
> Anyway, it also looks like you're ignoring the ABI2 flag, aren't you?
> Since it indicates n32, i believe that means the new reg names, no?
Now that I had a closer look: It's never set in binutils, which is
clearly a bug. It's used in elf32-mips.c as a check for n32 only,
where I found this snippet, too.
/* Compare ABI's. The 64-bit ABI does not use EF_MIPS_ABI. But, it
does set EI_CLASS differently from any 32-bit ABI. */
if ((new_flags & EF_MIPS_ABI) != (old_flags & EF_MIPS_ABI)
|| (elf_elfheader (ibfd)->e_ident[EI_CLASS]
!= elf_elfheader (obfd)->e_ident[EI_CLASS]))
So it can be only one part of the solution.
[snip]
> I believe it's more correct to change that so that either:
>
> * instead of EF_MIPS_ABI2, you use (EF_MIPS_ABI2 | <the other new ABI bits), or
>
> * if an ABI bit is specified use what it specifies, else if 32-bit ELF
> and no ABI bit is specified use old reg names, else (must be 64-bit
> ELF and no ABI bit specified) use new reg names. That only works if
> 64-bit ELF _always_ encodes o32/o64 binary ABIs properly, though.
I also found this snippet in elf32-mips.c, AFAICS it's best to
follow the algorithm, with the exception of checking for the special
ABI cases first. Here, ABI_64_P (which is == ELFCLASS64) is checked
first, so o64 and eabi64 are never detected. One more bug...
/* Return printable name for ABI. */
static INLINE char *
elf_mips_abi_name (abfd)
bfd *abfd;
{
flagword flags;
if (ABI_N32_P (abfd))
return "N32";
else if (ABI_64_P (abfd))
return "64";
flags = elf_elfheader (abfd)->e_flags;
switch (flags & EF_MIPS_ABI)
{
case 0:
return "none";
case E_MIPS_ABI_O32:
return "O32";
case E_MIPS_ABI_O64:
return "O64";
case E_MIPS_ABI_EABI32:
return "EABI32";
case E_MIPS_ABI_EABI64:
return "EABI64";
default:
return "unknown abi";
}
}
An accordingly changed version is appended.
Thiemo
2001-06-21 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
/gas/testsuite/ChangeLog
* mips/lb.d: Reflect disassembler output fixes.
* mips/mips32.d: Likewise.
* mips/mips64.d: Likewise. Typo.
* mips/sb.d: Likewise.
* mips/trunc.d: Likewise.
/opcodes/ChangeLog
* mips-dis.c (print_insn_arg): Don't use software integer registers
for coprocessor registers.
(get_mips_isa): Removed.
(_print_insn_mips): Get distinction between old ABI and new ABI right.
diff -BurPX /bigdisk/dl/src/binutils-exclude src-orig/gas/testsuite/gas/mips/lb.d src/gas/testsuite/gas/mips/lb.d
--- src-orig/gas/testsuite/gas/mips/lb.d Tue May 15 16:33:52 2001
+++ src/gas/testsuite/gas/mips/lb.d Tue Jun 19 02:11:13 2001
@@ -388,8 +388,8 @@
0+0378 <[^>]*> lw a0,0\(zero\)
0+037c <[^>]*> lwl a0,0\(zero\)
0+0380 <[^>]*> lwr a0,0\(zero\)
-0+0384 <[^>]*> lwc0 a0,0\(zero\)
+0+0384 <[^>]*> lwc0 \$4,0\(zero\)
0+0388 <[^>]*> lwc1 \$f4,0\(zero\)
-0+038c <[^>]*> lwc2 a0,0\(zero\)
-0+0390 <[^>]*> lwc3 a0,0\(zero\)
+0+038c <[^>]*> lwc2 \$4,0\(zero\)
+0+0390 <[^>]*> lwc3 \$4,0\(zero\)
...
diff -BurPX /bigdisk/dl/src/binutils-exclude src-orig/gas/testsuite/gas/mips/mips32.d src/gas/testsuite/gas/mips/mips32.d
--- src-orig/gas/testsuite/gas/mips/mips32.d Tue May 15 16:33:53 2001
+++ src/gas/testsuite/gas/mips/mips32.d Tue Jun 19 02:11:13 2001
@@ -26,15 +26,15 @@
0+0040 <[^>]*> 00000000 nop
0+0044 <[^>]*> 4903ffee bc2tl 0+0000 <text_label>
0+0048 <[^>]*> 00000000 nop
-0+004c <[^>]*> 48411000 cfc2 at,v0
+0+004c <[^>]*> 48411000 cfc2 at,\$2
0+0050 <[^>]*> 4b234567 c2 0x1234567
-0+0054 <[^>]*> 48c21800 ctc2 v0,v1
-0+0058 <[^>]*> 48032000 mfc2 v1,a0
-0+005c <[^>]*> 48042800 mfc2 a0,a1
-0+0060 <[^>]*> 48053007 mfc2 a1,a2,7
-0+0064 <[^>]*> 48863800 mtc2 a2,a3
-0+0068 <[^>]*> 48874000 mtc2 a3,t0
-0+006c <[^>]*> 48884807 mtc2 t0,t1,7
+0+0054 <[^>]*> 48c21800 ctc2 v0,\$3
+0+0058 <[^>]*> 48032000 mfc2 v1,\$4
+0+005c <[^>]*> 48042800 mfc2 a0,\$5
+0+0060 <[^>]*> 48053007 mfc2 a1,\$6,7
+0+0064 <[^>]*> 48863800 mtc2 a2,\$7
+0+0068 <[^>]*> 48874000 mtc2 a3,\$8
+0+006c <[^>]*> 48884807 mtc2 t0,\$9,7
0+0070 <[^>]*> bc250000 cache 0x5,0\(at\)
0+0074 <[^>]*> bc457fff cache 0x5,32767\(v0\)
0+0078 <[^>]*> bc658000 cache 0x5,-32768\(v1\)
diff -BurPX /bigdisk/dl/src/binutils-exclude src-orig/gas/testsuite/gas/mips/mips64.d src/gas/testsuite/gas/mips/mips64.d
--- src-orig/gas/testsuite/gas/mips/mips64.d Tue May 15 16:33:53 2001
+++ src/gas/testsuite/gas/mips/mips64.d Thu Jun 21 07:15:48 2001
@@ -2,16 +2,16 @@
#name: MIPS MIPS64 instructions
#as: -mips64
-# Check MIPS32 instruction assembly
+# Check MIPS64 instruction assembly
.*: +file format .*mips.*
Disassembly of section .text:
0+0000 <[^>]*> 70410825 dclo at,v0
0+0004 <[^>]*> 70831824 dclz v1,a0
-0+0008 <[^>]*> 48232000 dmfc2 v1,a0
-0+000c <[^>]*> 48242800 dmfc2 a0,a1
-0+0010 <[^>]*> 48253007 dmfc2 a1,a2,7
-0+0014 <[^>]*> 48a63800 dmtc2 a2,a3
-0+0018 <[^>]*> 48a74000 dmtc2 a3,t0
-0+001c <[^>]*> 48a84807 dmtc2 t0,t1,7
+0+0008 <[^>]*> 48232000 dmfc2 v1,\$4
+0+000c <[^>]*> 48242800 dmfc2 a0,\$5
+0+0010 <[^>]*> 48253007 dmfc2 a1,\$6,7
+0+0014 <[^>]*> 48a63800 dmtc2 a2,\$7
+0+0018 <[^>]*> 48a74000 dmtc2 a3,\$8
+0+001c <[^>]*> 48a84807 dmtc2 t0,\$9,7
diff -BurPX /bigdisk/dl/src/binutils-exclude src-orig/gas/testsuite/gas/mips/sb.d src/gas/testsuite/gas/mips/sb.d
--- src-orig/gas/testsuite/gas/mips/sb.d Tue May 15 16:33:53 2001
+++ src/gas/testsuite/gas/mips/sb.d Tue Jun 19 02:11:13 2001
@@ -386,10 +386,10 @@
0+0370 <[^>]*> sw a1,4\(zero\)
0+0374 <[^>]*> sh a0,0\(zero\)
0+0378 <[^>]*> sw a0,0\(zero\)
-0+037c <[^>]*> swc0 a0,0\(zero\)
+0+037c <[^>]*> swc0 \$4,0\(zero\)
0+0380 <[^>]*> swc1 \$f4,0\(zero\)
-0+0384 <[^>]*> swc2 a0,0\(zero\)
-0+0388 <[^>]*> swc3 a0,0\(zero\)
+0+0384 <[^>]*> swc2 \$4,0\(zero\)
+0+0388 <[^>]*> swc3 \$4,0\(zero\)
0+038c <[^>]*> swc1 \$f4,0\(zero\)
0+0390 <[^>]*> swl a0,0\(zero\)
0+0394 <[^>]*> swr a0,0\(zero\)
diff -BurPX /bigdisk/dl/src/binutils-exclude src-orig/gas/testsuite/gas/mips/trunc.d src/gas/testsuite/gas/mips/trunc.d
--- src-orig/gas/testsuite/gas/mips/trunc.d Tue May 15 16:33:53 2001
+++ src/gas/testsuite/gas/mips/trunc.d Tue Jun 19 02:11:13 2001
@@ -7,23 +7,23 @@
.*: +file format .*mips.*
Disassembly of section .text:
-0+0000 <[^>]*> cfc1 a0,ra
-0+0004 <[^>]*> cfc1 a0,ra
+0+0000 <[^>]*> cfc1 a0,\$31
+0+0004 <[^>]*> cfc1 a0,\$31
0+0008 <[^>]*> nop
0+000c <[^>]*> ori at,a0,0x3
0+0010 <[^>]*> xori at,at,0x2
-0+0014 <[^>]*> ctc1 at,ra
+0+0014 <[^>]*> ctc1 at,\$31
0+0018 <[^>]*> nop
0+001c <[^>]*> cvt.w.d \$f4,\$f6
-0+0020 <[^>]*> ctc1 a0,ra
+0+0020 <[^>]*> ctc1 a0,\$31
0+0024 <[^>]*> nop
-0+0028 <[^>]*> cfc1 a0,ra
-0+002c <[^>]*> cfc1 a0,ra
+0+0028 <[^>]*> cfc1 a0,\$31
+0+002c <[^>]*> cfc1 a0,\$31
0+0030 <[^>]*> nop
0+0034 <[^>]*> ori at,a0,0x3
0+0038 <[^>]*> xori at,at,0x2
-0+003c <[^>]*> ctc1 at,ra
+0+003c <[^>]*> ctc1 at,\$31
0+0040 <[^>]*> nop
0+0044 <[^>]*> cvt.w.s \$f4,\$f6
-0+0048 <[^>]*> ctc1 a0,ra
+0+0048 <[^>]*> ctc1 a0,\$31
0+004c <[^>]*> nop
diff -BurPX /bigdisk/dl/src/binutils-exclude src-orig/opcodes/mips-dis.c src/opcodes/mips-dis.c
--- src-orig/opcodes/mips-dis.c Wed May 23 21:09:17 2001
+++ src/opcodes/mips-dis.c Thu Jun 21 07:09:49 2001
@@ -256,13 +256,13 @@
break;
case 'E':
- (*info->fprintf_func) (info->stream, "%s",
- reg_names[(l >> OP_SH_RT) & OP_MASK_RT]);
+ (*info->fprintf_func) (info->stream, "$%d",
+ (l >> OP_SH_RT) & OP_MASK_RT);
break;
case 'G':
- (*info->fprintf_func) (info->stream, "%s",
- reg_names[(l >> OP_SH_RD) & OP_MASK_RD]);
+ (*info->fprintf_func) (info->stream, "$%d",
+ (l >> OP_SH_RD) & OP_MASK_RD);
break;
case 'N':
@@ -394,19 +394,6 @@
break;
}
}
-
-/* Figure out ISA from disassemble_info data */
-
-static int
-get_mips_isa (info)
- struct disassemble_info *info;
-{
- int isa;
- int cpu;
-
- mips_isa_type (info->mach, &isa, &cpu);
- return isa;
-}
/* Print the mips instruction at address MEMADDR in debugged memory,
on using INFO. Returns length of the instruction, in bytes, which is
@@ -522,14 +509,20 @@
#endif
/* Use mips64_reg_names for new ABI. */
- if (info->flavour == bfd_target_elf_flavour
- && info->symbols != NULL
- && (((get_mips_isa(info) | INSN_ISA_MASK) & ISA_MIPS2) != 0)
- && ((elf_elfheader (bfd_asymbol_bfd(*(info->symbols)))->e_flags
- & EF_MIPS_ABI2) != 0))
- reg_names = mips64_reg_names;
- else
- reg_names = mips32_reg_names;
+ reg_names = mips32_reg_names;
+
+ if (info->flavour == bfd_target_elf_flavour && info->symbols != NULL)
+ {
+ Elf_Internal_Ehdr *header;
+
+ header = (Elf_Internal_Ehdr *) bfd_asymbol_bfd(*(info->symbols));
+
+ if ((header->e_flags &
+ (E_MIPS_ABI_EABI32 | E_MIPS_ABI_EABI64 | EF_MIPS_ABI2)) != 0
+ || (header->e_ident[EI_CLASS] == ELFCLASS64
+ && (header->e_flags & E_MIPS_ABI_O64) == 0))
+ reg_names = mips64_reg_names;
+ }
status = (*info->read_memory_func) (memaddr, buffer, INSNLEN, info);
if (status == 0)