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[patch] Rest of the changes for Coldfire V4
- To: <binutils at sources dot redhat dot com>
- Subject: [patch] Rest of the changes for Coldfire V4
- From: "Igor Shevlyakov" <igor dot shevlyakov at windriver dot com>
- Date: Mon, 5 Mar 2001 17:32:34 -0800
------- ChangeLog entry for opcodes/ ----------------------------
2001-03-05 Igor Shevlyakov <igor@windriver.com>
* m68k-dis.c (print_insn_m68k): recognize Coldfire CPUs
so command line switches will work.
------- ChangeLog entry for bfd/ --------------------------------
2001-03-05 Igor Shevlyakov <igor@windriver.com>
* archures.c (bfd_default_scan): add Coldfire CPUs.
* bfd-in2.h: define bfd_march members for Coldfire CPUs.
* cpu-m68k.c: add Coldfire CPUs for arch table.
* ieee.c (ieee_write_processor): set proper id for
Coldfire CPUs.
------- ChangeLog entry for gas/ ---------------------------------
2001-03-05 Igor Shevlyakov <igor@windriver.com>
* config/tc-m68k.c : add 5407 to archs[] table.
(HAVE_LONG_BRANCH): add mcf5407
(select_control_regs): recognize 5407
Index: src/bfd/archures.c
===================================================================
RCS file: /cvs/src/src/bfd/archures.c,v
retrieving revision 1.32
diff -c -3 -p -r1.32 archures.c
*** archures.c 2001/02/18 23:32:53 1.32
--- archures.c 2001/03/06 01:13:41
*************** DESCRIPTION
*** 79,84 ****
--- 79,88 ----
.#define bfd_mach_m68040 6
.#define bfd_mach_m68060 7
.#define bfd_mach_cpu32 8
+ .#define bfd_mach_mcf5200 9
+ .#define bfd_mach_mcf5206e 10
+ .#define bfd_mach_mcf5307 11
+ .#define bfd_mach_mcf5407 12
. bfd_arch_vax, {* DEC Vax *}
. bfd_arch_i960, {* Intel 960 *}
. {* The order of the following is important.
*************** bfd_default_scan (info, string)
*** 855,860 ****
--- 859,880 ----
case 68332:
arch = bfd_arch_m68k;
number = bfd_mach_cpu32;
+ break;
+ case 5200:
+ arch = bfd_arch_m68k;
+ number = bfd_mach_mcf5200;
+ break;
+ case 5206:
+ arch = bfd_arch_m68k;
+ number = bfd_mach_mcf5206e;
+ break;
+ case 5307:
+ arch = bfd_arch_m68k;
+ number = bfd_mach_mcf5307;
+ break;
+ case 5407:
+ arch = bfd_arch_m68k;
+ number = bfd_mach_mcf5407;
break;
case 32000:
Index: src/bfd/bfd-in2.h
===================================================================
RCS file: /cvs/src/src/bfd/bfd-in2.h,v
retrieving revision 1.87
diff -c -3 -p -r1.87 bfd-in2.h
*** bfd-in2.h 2001/02/18 23:32:53 1.87
--- bfd-in2.h 2001/03/06 01:13:45
*************** enum bfd_architecture
*** 1348,1353 ****
--- 1348,1357 ----
#define bfd_mach_m68040 6
#define bfd_mach_m68060 7
#define bfd_mach_cpu32 8
+ #define bfd_mach_mcf5200 9
+ #define bfd_mach_mcf5206e 10
+ #define bfd_mach_mcf5307 11
+ #define bfd_mach_mcf5407 12
bfd_arch_vax, /* DEC Vax */
bfd_arch_i960, /* Intel 960 */
/* The order of the following is important.
Index: src/bfd/cpu-m68k.c
===================================================================
RCS file: /cvs/src/src/bfd/cpu-m68k.c,v
retrieving revision 1.2
diff -c -3 -p -r1.2 cpu-m68k.c
*** cpu-m68k.c 2000/11/16 20:48:09 1.2
--- cpu-m68k.c 2001/03/06 01:13:45
*************** Foundation, Inc., 59 Temple Place - Suit
*** 27,33 ****
{ 32, 32, 8, bfd_arch_m68k, name,
"m68k",print,2,d,bfd_default_compatible,bfd_default_scan, next, }
static const bfd_arch_info_type arch_info_struct[] =
! {
N(bfd_mach_m68000, "m68k:68000", false, &arch_info_struct[1]),
N(bfd_mach_m68008, "m68k:68008", false, &arch_info_struct[2]),
N(bfd_mach_m68010, "m68k:68010", false, &arch_info_struct[3]),
--- 27,33 ----
{ 32, 32, 8, bfd_arch_m68k, name,
"m68k",print,2,d,bfd_default_compatible,bfd_default_scan, next, }
static const bfd_arch_info_type arch_info_struct[] =
! {
N(bfd_mach_m68000, "m68k:68000", false, &arch_info_struct[1]),
N(bfd_mach_m68008, "m68k:68008", false, &arch_info_struct[2]),
N(bfd_mach_m68010, "m68k:68010", false, &arch_info_struct[3]),
*************** static const bfd_arch_info_type arch_inf
*** 35,40 ****
--- 35,44 ----
N(bfd_mach_m68030, "m68k:68030", false, &arch_info_struct[5]),
N(bfd_mach_m68040, "m68k:68040", false, &arch_info_struct[6]),
N(bfd_mach_cpu32, "m68k:cpu32", false, &arch_info_struct[7]),
+ N(bfd_mach_mcf5200,"m68k:5200", false, &arch_info_struct[8]),
+ N(bfd_mach_mcf5206e,"m68k:5206e", false, &arch_info_struct[9]),
+ N(bfd_mach_mcf5307, "m68k:5307", false, &arch_info_struct[10]),
+ N(bfd_mach_mcf5407, "m68k:5407", false, &arch_info_struct[11]),
N(bfd_mach_m68060, "m68k:68060", false, 0),
};
Index: src/bfd/ieee.c
===================================================================
RCS file: /cvs/src/src/bfd/ieee.c,v
retrieving revision 1.13
diff -c -3 -p -r1.13 ieee.c
*** ieee.c 2000/10/25 21:53:44 1.13
--- ieee.c 2001/03/06 01:13:47
*************** ieee_write_processor (abfd)
*** 3581,3586 ****
--- 3581,3590 ----
case bfd_mach_m68040: id = "68040"; break;
case bfd_mach_m68060: id = "68060"; break;
case bfd_mach_cpu32: id = "cpu32"; break;
+ case bfd_mach_mcf5200: id = "5200"; break;
+ case bfd_mach_mcf5206e: id = "5206e"; break;
+ case bfd_mach_mcf5307: id = "5307"; break;
+ case bfd_mach_mcf5407: id = "5407"; break;
}
if (! ieee_write_id (abfd, id))
Index: src/gas/config/tc-m68k.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-m68k.c,v
retrieving revision 1.17
diff -c -3 -p -r1.17 tc-m68k.c
*** tc-m68k.c 2001/01/25 20:26:17 1.17
--- tc-m68k.c 2001/03/06 01:13:51
*************** struct m68k_it
*** 229,235 ****
#define arch_coldfire_p(x) (((x) & mcf) != 0)
/* Macros for determining if cpu supports a specific addressing mode */
! #define HAVE_LONG_BRANCH(x) ((x) & (m68020|m68030|m68040|m68060|cpu32))
static struct m68k_it the_ins; /* the instruction being assembled */
--- 229,235 ----
#define arch_coldfire_p(x) (((x) & mcf) != 0)
/* Macros for determining if cpu supports a specific addressing mode */
! #define HAVE_LONG_BRANCH(x) ((x) &
(m68020|m68030|m68040|m68060|cpu32|mcf5407))
static struct m68k_it the_ins; /* the instruction being assembled */
*************** static const struct m68k_cpu archs[] = {
*** 370,375 ****
--- 370,376 ----
{ mcf5200, "5200", 0 },
{ mcf5206e, "5206e", 0 },
{ mcf5307, "5307", 0},
+ { mcf5407, "5407", 0},
/* Aliases (effectively, so far as gas is concerned) for the above
cpus. */
{ m68020, "68k", 1 },
*************** select_control_regs ()
*** 3965,3970 ****
--- 3966,3972 ----
case mcf5200:
case mcf5206e:
case mcf5307:
+ case mcf5407:
control_regs = mcf_control_regs;
break;
default:
Index: src/opcodes/m68k-dis.c
===================================================================
RCS file: /cvs/src/src/opcodes/m68k-dis.c,v
retrieving revision 1.4
diff -c -3 -p -r1.4 m68k-dis.c
*** m68k-dis.c 2000/05/08 07:22:54 1.4
--- m68k-dis.c 2001/03/06 01:14:00
*************** print_insn_m68k (memaddr, info)
*** 255,260 ****
--- 255,272 ----
case bfd_mach_m68060:
arch_mask = m68060;
break;
+ case bfd_mach_mcf5200:
+ arch_mask = mcf5200;
+ break;
+ case bfd_mach_mcf5206e:
+ arch_mask = mcf5206e;
+ break;
+ case bfd_mach_mcf5307:
+ arch_mask = mcf5407;
+ break;
+ case bfd_mach_mcf5407:
+ arch_mask = mcf5407;
+ break;
}
arch_mask |= m68881 | m68851;