This is the mail archive of the
binutils@sources.redhat.com
mailing list for the binutils project.
[PATCH]: Fix movw/movb operands for 68HC12
- To: binutils at sourceware dot cygnus dot com
- Subject: [PATCH]: Fix movw/movb operands for 68HC12
- From: Stephane Carrez <Stephane dot Carrez at worldnet dot fr>
- Date: Sun, 26 Nov 2000 23:19:26 +0100
Hi!
There was a problem in 68HC12 assembler that failed to assemble
movw -1,-2
The assembler was expecting a register after the first constant
(here the two constants correspond to addresses).
I've comitted the following patch to fix that problem.
I also added a test verify the fix.
Stephane
2000-11-26 Stephane Carrez <Stephane.Carrez@worldnet.fr>
* config/tc-m68hc11.c (build_indexed_byte): Print the offset in
the error message.
(get_operand): Fix analysis for movw/movb instructions.
2000-11-26 Stephane Carrez <Stephane.Carrez@worldnet.fr>
* gas/m68hc11/opers12.s: New test for movw operands.
* gas/m68hc11/opers12.d: Likewise.
Index: config/tc-m68hc11.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-m68hc11.c,v
retrieving revision 1.7
diff -p -r1.7 tc-m68hc11.c
*** tc-m68hc11.c 2000/11/17 08:47:52 1.7
--- tc-m68hc11.c 2000/11/26 21:15:27
*************** get_operand (oper, which, opmode)
*** 1073,1078 ****
--- 1073,1080 ----
if (*p == ',')
{
+ int possible_mode = M6811_OP_NONE;
+ char *old_input_line;
p++;
/* 68HC12 pre increment or decrement. */
*************** get_operand (oper, which, opmode)
*** 1080,1102 ****
{
if (*p == '-')
{
! mode = M6812_PRE_DEC;
p++;
- if (current_architecture & cpu6811)
- as_bad (_("Pre-decrement mode is not valid for 68HC11"));
}
else if (*p == '+')
{
! mode = M6812_PRE_INC;
p++;
- if (current_architecture & cpu6811)
- as_bad (_("Pre-increment mode is not valid for 68HC11"));
}
p = skip_whites (p);
}
input_line_pointer = p;
reg = register_name ();
/* Backtrack. */
if (which == 0 && opmode & M6812_OP_IDX_P2
&& reg != REG_X && reg != REG_Y
--- 1082,1118 ----
{
if (*p == '-')
{
! possible_mode = M6812_PRE_DEC;
p++;
}
else if (*p == '+')
{
! possible_mode = M6812_PRE_INC;
p++;
}
p = skip_whites (p);
}
+ old_input_line = input_line_pointer;
input_line_pointer = p;
reg = register_name ();
+ /* Backtrack if we have a valid constant expression and
+ it does not correspond to the offset of the 68HC12 indexed
+ addressing mode (as in N,x). */
+ if (reg == REG_NONE && mode == M6811_OP_NONE
+ && possible_mode != M6811_OP_NONE)
+ {
+ oper->mode = M6811_OP_IND16 | M6811_OP_JUMP_REL;
+ input_line_pointer = skip_whites (old_input_line);
+ return 1;
+ }
+
+ if (possible_mode != M6811_OP_NONE)
+ mode = possible_mode;
+
+ if ((current_architecture & cpu6811)
+ && possible_mode != M6811_OP_NONE)
+ as_bad (_("Pre-increment mode is not valid for 68HC11"));
/* Backtrack. */
if (which == 0 && opmode & M6812_OP_IDX_P2
&& reg != REG_X && reg != REG_Y
*************** build_indexed_byte (op, format, move_ins
*** 1700,1706 ****
if (move_insn && !(val >= -16 && val <= 15))
{
! as_bad (_("Offset out of 5-bit range for movw/movb insn."));
return -1;
}
--- 1716,1723 ----
if (move_insn && !(val >= -16 && val <= 15))
{
! as_bad (_("Offset out of 5-bit range for movw/movb insn: %ld."),
! val);
return -1;
}
Index: testsuite/gas/m68hc11/opers12.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/m68hc11/opers12.d,v
retrieving revision 1.1
diff -p -r1.1 opers12.d
*** opers12.d 2000/06/19 01:22:41 1.1
--- opers12.d 2000/11/26 21:15:38
*************** Disassembly of section .text:
*** 67,70 ****
0+0b6 <L1\+0xad> trap #64
0+0b8 <L1\+0xaf> trap #128
0+0ba <L1\+0xb1> trap #255
! 0+0bc <L2> rts
--- 67,81 ----
0+0b6 <L1\+0xad> trap #64
0+0b8 <L1\+0xaf> trap #128
0+0ba <L1\+0xb1> trap #255
! 0+0bc <L2> movw 1,X, 2,X
! 0+0c0 <L2\+0x4> movw 0+0ffff <L2\+0xff43>, 0000ffff <L2\+0xff43>
! 0+0c6 <L2\+0xa> movw 0+0ffff <L2\+0xff43>, 1,X
! 0+0cb <L2\+0xf> movw #0+0ffff <L2\+0xff43>, 1,X
! 0+0d0 <L2\+0x14> movw 0+03 <start\+0x3>, 0+08 <start\+0x8>
! 0+0d6 <L2\+0x1a> movw #0+03 <start\+0x3>, 0+03 <start\+0x3>
! 0+0dc <L2\+0x20> movw #0+03 <start\+0x3>, 1,X
! 0+0e1 <L2\+0x25> movw 0+03 <start\+0x3>, 1,X
! 0+0e6 <L2\+0x2a> movw 0+03 <start\+0x3>, 2,X
! 0+0eb <L2\+0x2f> movw 0+04 <start\+0x4>, -2,X
! 0+0f0 <L2\+0x34> rts
!
Index: testsuite/gas/m68hc11/opers12.s
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/m68hc11/opers12.s,v
retrieving revision 1.1
diff -p -r1.1 opers12.s
*** opers12.s 2000/06/19 01:22:41 1.1
--- opers12.s 2000/11/26 21:15:38
*************** L1: ldy ,x
*** 69,72 ****
--- 69,82 ----
trap #0x80
trap #255
L2:
+ movw 1,x,2,x
+ movw -1,-1
+ movw -1,1,x
+ movw #-1,1,x
+ movw 3,8
+ movw #3,3
+ movw #3,1,x
+ movw 3,1,x
+ movw 3,+2,x
+ movw 4,-2,x
rts