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patches for IA-64 F-unit

To: binutils at sourceware dot cygnus dot com
Subject: patches for IA-64 F-unit
From: Timothy Wall <twall at cygnus dot com>
Date: Sat, 22 Apr 2000 22:54:10 -0400

These patches clean up some IA-64 F-unit assembly and corresponding
tests.

Index: ChangeLog
===================================================================
RCS file: /cvs/src/src/gas/ChangeLog,v
retrieving revision 1.331
diff -d -c -p -b -w -r1.331 ChangeLog
*** ChangeLog	2000/04/21 21:55:21	1.331
--- ChangeLog	2000/04/23 02:52:44
***************
*** 1,3 ****
--- 1,9 ----
+ 2000-04-22  Timothy Wall  <twall@cygnus.com>
+ 
+ 	* config/tc-ia64.c (pseudo_func[]): Add new "nat" entry equivalent
+ 	to "natval".
+ 	(operand_match): Conditionally insert default bit values for IMMU9.
+ 
  2000-04-14  Matthew Green  <mrg@cygnus.com>
  
  	* configure.in: Add NetBSD/sparc ELF and NetBSD/sparc64 support.
Index: testsuite/ChangeLog
===================================================================
RCS file: /cvs/src/src/gas/testsuite/ChangeLog,v
retrieving revision 1.57
diff -d -c -p -b -w -r1.57 ChangeLog
*** ChangeLog	2000/04/21 20:22:22	1.57
--- ChangeLog	2000/04/23 02:52:45
***************
*** 1,3 ****
--- 1,8 ----
+ 2000-04-22  Timothy Wall  <twall@cygnus.com>
+ 
+ 	* gas/ia64/opc-f.d: Disassemble zeroes to verify break.f.
+ 	* gas/ia64/opc-f.s: Add an explicit stop to make IAS output match.
+ 
  Fri Apr 21 13:20:53 2000  Richard Henderson  <rth@cygnus.com>
  			  David Mosberger  <davidm@hpl.hp.com>
  			  Timothy Wall <twall@cygnus.com>
Index: config/tc-ia64.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-ia64.c,v
retrieving revision 1.1
diff -d -c -p -b -w -r1.1 tc-ia64.c
*** tc-ia64.c	2000/04/21 20:22:22	1.1
--- tc-ia64.c	2000/04/23 02:52:46
*************** pseudo_func[] =
*** 448,454 ****
      { "shuf",	PSEUDO_FUNC_CONST, { 0x9 } },
  
      /* fclass constants: */
!     { "natval",	PSEUDO_FUNC_CONST, { 0x100 } },
      { "qnan",	PSEUDO_FUNC_CONST, { 0x080 } },
      { "snan",	PSEUDO_FUNC_CONST, { 0x040 } },
      { "pos",	PSEUDO_FUNC_CONST, { 0x001 } },
--- 448,454 ----
      { "shuf",	PSEUDO_FUNC_CONST, { 0x9 } },
  
      /* fclass constants: */
!     { "nat",	PSEUDO_FUNC_CONST, { 0x100 } },
      { "qnan",	PSEUDO_FUNC_CONST, { 0x080 } },
      { "snan",	PSEUDO_FUNC_CONST, { 0x040 } },
      { "pos",	PSEUDO_FUNC_CONST, { 0x001 } },
*************** pseudo_func[] =
*** 457,462 ****
--- 457,464 ----
      { "unorm",	PSEUDO_FUNC_CONST, { 0x008 } },
      { "norm",	PSEUDO_FUNC_CONST, { 0x010 } },
      { "inf",	PSEUDO_FUNC_CONST, { 0x020 } },
+ 
+     { "natval",	PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */
    };
  
  /* 41-bit nop opcodes (one per unit): */
*************** operand_match (idesc, index, e)
*** 3815,3821 ****
      case IA64_OPND_IMMU2:
      case IA64_OPND_IMMU7a:
      case IA64_OPND_IMMU7b:
-     case IA64_OPND_IMMU9:
      case IA64_OPND_IMMU21:
      case IA64_OPND_IMMU24:
      case IA64_OPND_MBTYPE4:
--- 3817,3822 ----
*************** operand_match (idesc, index, e)
*** 3825,3830 ****
--- 3826,3843 ----
        if (e->X_op == O_constant
  	  && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
  	return 1;
+       break;
+ 
+     case IA64_OPND_IMMU9:
+       bits = operand_width (idesc->operands[index]);
+       if (e->X_op == O_constant
+ 	  && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
+         {
+           int lobits = e->X_add_number & 0x3;
+           if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0)
+             e->X_add_number |= (bfd_vma)0x3;
+           return 1;
+         }
        break;
  
      case IA64_OPND_IMM44:
Index: testsuite/gas/ia64/opc-f.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/ia64/opc-f.d,v
retrieving revision 1.1
diff -d -c -p -b -w -r1.1 opc-f.d
*** opc-f.d	2000/04/21 20:22:22	1.1
--- opc-f.d	2000/04/23 02:52:46
***************
*** 1,4 ****
! # objdump: -d
  # name: ia64 opc-f
  
  .*: +file format .*
--- 1,4 ----
! # objdump: -d --disassemble-zeroes
  # name: ia64 opc-f
  
  .*: +file format .*
*************** Disassembly of section \.text:
*** 469,484 ****
       996:	40 38 14 0c 76 00 	            xma\.hu f4=f5,f6,f7
       99c:	00 00 04 00       	            nop\.i 0x0
       9a0:	0c 00 00 00 01 00 	\[MFI\]       nop\.m 0x0
!      9a6:	40 00 14 0c 74 00 	            xma\.l f4=f5,f6,f0
       9ac:	00 00 04 00       	            nop\.i 0x0
       9b0:	0c 00 00 00 01 00 	\[MFI\]       nop\.m 0x0
!      9b6:	40 00 14 0c 74 00 	            xma\.l f4=f5,f6,f0
       9bc:	00 00 04 00       	            nop\.i 0x0
       9c0:	0c 00 00 00 01 00 	\[MFI\]       nop\.m 0x0
!      9c6:	40 00 14 0c 77 00 	            xma\.h f4=f5,f6,f0
       9cc:	00 00 04 00       	            nop\.i 0x0
       9d0:	0c 00 00 00 01 00 	\[MFI\]       nop\.m 0x0
!      9d6:	40 00 14 0c 76 00 	            xma\.hu f4=f5,f6,f0
       9dc:	00 00 04 00       	            nop\.i 0x0
       9e0:	0c 00 00 00 01 00 	\[MFI\]       nop\.m 0x0
       9e6:	40 38 14 0c 70 00 	            fselect f4=f5,f6,f7
--- 469,484 ----
       996:	40 38 14 0c 76 00 	            xma\.hu f4=f5,f6,f7
       99c:	00 00 04 00       	            nop\.i 0x0
       9a0:	0c 00 00 00 01 00 	\[MFI\]       nop\.m 0x0
!      9a6:	40 00 14 0c 74 00 	            xmpy\.l f4=f5,f6
       9ac:	00 00 04 00       	            nop\.i 0x0
       9b0:	0c 00 00 00 01 00 	\[MFI\]       nop\.m 0x0
!      9b6:	40 00 14 0c 74 00 	            xmpy\.l f4=f5,f6
       9bc:	00 00 04 00       	            nop\.i 0x0
       9c0:	0c 00 00 00 01 00 	\[MFI\]       nop\.m 0x0
!      9c6:	40 00 14 0c 77 00 	            xmpy\.h f4=f5,f6
       9cc:	00 00 04 00       	            nop\.i 0x0
       9d0:	0c 00 00 00 01 00 	\[MFI\]       nop\.m 0x0
!      9d6:	40 00 14 0c 76 00 	            xmpy\.hu f4=f5,f6
       9dc:	00 00 04 00       	            nop\.i 0x0
       9e0:	0c 00 00 00 01 00 	\[MFI\]       nop\.m 0x0
       9e6:	40 38 14 0c 70 00 	            fselect f4=f5,f6,f7
*************** Disassembly of section \.text:
*** 1210,1217 ****
      1906:	00 e7 ff 10 07 00 	            fchkf\.s3 0 <_start>
      190c:	00 00 04 00       	            nop\.i 0x0
      1910:	0c 00 00 00 01 00 	\[MFI\]       nop\.m 0x0
! 	\.\.\.
!     191e:	04 00 0c 00       	            nop\.i 0x0
!     1922:	00 00 01 00 00 00 	\[MFI\]       nop\.m 0x0
!     1928:	00 02 00 00 00 00 	            nop\.f 0x0
!     192e:	04 00 00 00       	            nop\.i 0x0
--- 1210,1217 ----
      1906:	00 e7 ff 10 07 00 	            fchkf\.s3 0 <_start>
      190c:	00 00 04 00       	            nop\.i 0x0
      1910:	0c 00 00 00 01 00 	\[MFI\]       nop\.m 0x0
!     1916:	00 00 00 00 00 00 	            break\.f 0x0
!     191c:	00 00 04 00       	            nop\.i 0x0
!     1920:	0d 00 00 00 01 00 	\[MFI\]       nop\.m 0x0
!     1926:	00 00 00 02 00 00 	            nop\.f 0x0
!     192c:	00 00 04 00       	            nop\.i 0x0;;
Index: testsuite/gas/ia64/opc-f.s
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/ia64/opc-f.s,v
retrieving revision 1.1
diff -d -c -p -b -w -r1.1 opc-f.s
*** opc-f.s	2000/04/21 20:22:22	1.1
--- opc-f.s	2000/04/23 02:52:46
*************** _start:
*** 477,481 ****
  	fchkf.s3 _start
  
  	break.f 0
! 	nop.f 0
  
--- 477,481 ----
  	fchkf.s3 _start
  
  	break.f 0
! 	nop.f 0;;

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