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[PATCH] TI COFF bfd/include configury
- To: binutils at sourceware dot cygnus dot com
- Subject: [PATCH] TI COFF bfd/include configury
- From: Timothy Wall <twall at cygnus dot com>
- Date: Fri, 07 Apr 2000 09:28:10 -0400
These patches add the tic54x target and TI COFF support for bfd and
include/coff.
This is all target-specific code.
? bfd/diffs.txt
? include/opcode/tic54x.h
Index: bfd/ChangeLog
===================================================================
RCS file: /cvs/src/src/bfd/ChangeLog,v
retrieving revision 1.378
diff -d -c -p -r1.378 ChangeLog
*** ChangeLog 2000/04/07 03:59:23 1.378
--- ChangeLog 2000/04/07 13:20:13
***************
*** 1,3 ****
--- 1,18 ----
+ 2000-04-07 Timothy Wall <twall@cygnus.com>
+
+ * targets.c: Added vecs for tic54x.
+ * reloc.c: Added relocs for tic54x.
+ * libbfd.h: Regenerated.
+ * configure: Add TI COFF vecs for tic54x.
+ * configure.in: Ditto.
+ * config.bfd (targ_cpu): Recognize new tic54x target.
+ * coffcode.h (coff_slurp_symbol_table): Additions for TI COFF handling.
+ * bfd-in2.h: Add tic54x target and relocations.
+ * Makefile.am, Makefile.in: Add tic54x target.
+ * archures.c (bfd_archures_list): Add tic54x target.
+ * coff-tic54x.c: New.
+ * cpu-tic54x.c: New.
+
2000-04-06 Michael Snyder <msnyder@seadog.cygnus.com>
* elfcore.h (elf_core_file_p): call backend_object_p which
Index: bfd/Makefile.am
===================================================================
RCS file: /cvs/src/src/bfd/Makefile.am,v
retrieving revision 1.16
diff -d -c -p -r1.16 Makefile.am
*** Makefile.am 2000/04/04 10:53:53 1.16
--- Makefile.am 2000/04/07 13:20:13
*************** ALL_MACHINES = \
*** 66,71 ****
--- 66,72 ----
cpu-sh.lo \
cpu-sparc.lo \
cpu-tic30.lo \
+ cpu-tic54x.lo \
cpu-tic80.lo \
cpu-v850.lo \
cpu-vax.lo \
*************** ALL_MACHINES_CFILES = \
*** 103,108 ****
--- 104,110 ----
cpu-sh.c \
cpu-sparc.c \
cpu-tic30.c \
+ cpu-tic54x.c \
cpu-tic80.c \
cpu-v850.c \
cpu-vax.c \
*************** BFD32_BACKENDS = \
*** 145,150 ****
--- 147,153 ----
coff-stgo32.lo \
coff-svm68k.lo \
coff-tic30.lo \
+ coff-tic54x.lo \
coff-tic80.lo \
coff-u68k.lo \
coff-we32k.lo \
*************** BFD32_BACKENDS_CFILES = \
*** 275,280 ****
--- 278,284 ----
coff-stgo32.c \
coff-svm68k.c \
coff-tic30.c \
+ coff-tic54x.c \
coff-tic80.c \
coff-u68k.c \
coff-we32k.c \
*************** cpu-sh.lo: cpu-sh.c
*** 715,720 ****
--- 719,725 ----
cpu-sparc.lo: cpu-sparc.c
cpu-tic30.lo: cpu-tic30.c
cpu-tic80.lo: cpu-tic80.c
+ cpu-tic54x.lo: cpu-tic54x.c
cpu-v850.lo: cpu-v850.c
cpu-vax.lo: cpu-vax.c
cpu-we32k.lo: cpu-we32k.c
*************** coff-svm68k.lo: coff-svm68k.c coff-m68k.
*** 808,813 ****
--- 813,820 ----
coff-tic30.lo: coff-tic30.c $(INCDIR)/bfdlink.h $(INCDIR)/coff/tic30.h \
$(INCDIR)/coff/internal.h libcoff.h coffcode.h coffswap.h
coff-tic80.lo: coff-tic80.c $(INCDIR)/bfdlink.h $(INCDIR)/coff/tic80.h \
+ $(INCDIR)/coff/internal.h libcoff.h coffcode.h coffswap.h
+ coff-tic54x.lo: coff-tic54x.c $(INCDIR)/bfdlink.h $(INCDIR)/coff/tic54x.h \
$(INCDIR)/coff/internal.h libcoff.h coffcode.h coffswap.h
coff-u68k.lo: coff-u68k.c coff-m68k.c $(INCDIR)/coff/m68k.h \
$(INCDIR)/coff/internal.h libcoff.h $(INCDIR)/bfdlink.h \
Index: bfd/Makefile.in
===================================================================
RCS file: /cvs/src/src/bfd/Makefile.in,v
retrieving revision 1.18
diff -d -c -p -r1.18 Makefile.in
*** Makefile.in 2000/04/04 10:53:53 1.18
--- Makefile.in 2000/04/07 13:20:14
*************** ALL_MACHINES = \
*** 184,189 ****
--- 184,190 ----
cpu-sh.lo \
cpu-sparc.lo \
cpu-tic30.lo \
+ cpu-tic54x.lo \
cpu-tic80.lo \
cpu-v850.lo \
cpu-vax.lo \
*************** ALL_MACHINES_CFILES = \
*** 222,227 ****
--- 223,229 ----
cpu-sh.c \
cpu-sparc.c \
cpu-tic30.c \
+ cpu-tic54x.c \
cpu-tic80.c \
cpu-v850.c \
cpu-vax.c \
*************** BFD32_BACKENDS = \
*** 265,270 ****
--- 267,273 ----
coff-stgo32.lo \
coff-svm68k.lo \
coff-tic30.lo \
+ coff-tic54x.lo \
coff-tic80.lo \
coff-u68k.lo \
coff-we32k.lo \
*************** BFD32_BACKENDS_CFILES = \
*** 396,401 ****
--- 399,405 ----
coff-stgo32.c \
coff-svm68k.c \
coff-tic30.c \
+ coff-tic54x.c \
coff-tic80.c \
coff-u68k.c \
coff-we32k.c \
*************** cpu-sh.lo: cpu-sh.c
*** 1262,1267 ****
--- 1266,1272 ----
cpu-sparc.lo: cpu-sparc.c
cpu-tic30.lo: cpu-tic30.c
cpu-tic80.lo: cpu-tic80.c
+ cpu-tic54x.lo: cpu-tic54x.c
cpu-v850.lo: cpu-v850.c
cpu-vax.lo: cpu-vax.c
cpu-we32k.lo: cpu-we32k.c
*************** coff-tic30.lo: coff-tic30.c $(INCDIR)/bf
*** 1356,1361 ****
--- 1361,1369 ----
$(INCDIR)/coff/internal.h libcoff.h coffcode.h coffswap.h
coff-tic80.lo: coff-tic80.c $(INCDIR)/bfdlink.h $(INCDIR)/coff/tic80.h \
$(INCDIR)/coff/internal.h libcoff.h coffcode.h coffswap.h
+ coff-tic54x.lo: coff-tic54x.c $(INCDIR)/bfdlink.h $(INCDIR)/coff/ti.h \
+ $(INCDIR)/coff/tic54x.h $(INCDIR)/coff/internal.h \
+ libcoff.h coffcode.h coffswap.h
coff-u68k.lo: coff-u68k.c coff-m68k.c $(INCDIR)/coff/m68k.h \
$(INCDIR)/coff/internal.h libcoff.h $(INCDIR)/bfdlink.h \
coffcode.h coffswap.h
Index: bfd/archures.c
===================================================================
RCS file: /cvs/src/src/bfd/archures.c,v
retrieving revision 1.11
diff -d -c -p -r1.11 archures.c
*** archures.c 2000/03/27 08:39:12 1.11
--- archures.c 2000/04/07 13:20:14
*************** DESCRIPTION
*** 181,186 ****
--- 181,187 ----
. bfd_arch_ns32k, {* National Semiconductors ns32000 *}
. bfd_arch_w65, {* WDC 65816 *}
. bfd_arch_tic30, {* Texas Instruments TMS320C30 *}
+ . bfd_arch_tic54x, {* Texas Instruments TMS320C54X *}
. bfd_arch_tic80, {* TI TMS320c80 (MVP) *}
. bfd_arch_v850, {* NEC V850 *}
.#define bfd_mach_v850 0
*************** extern const bfd_arch_info_type bfd_pj_a
*** 267,272 ****
--- 268,274 ----
extern const bfd_arch_info_type bfd_sh_arch;
extern const bfd_arch_info_type bfd_sparc_arch;
extern const bfd_arch_info_type bfd_tic30_arch;
+ extern const bfd_arch_info_type bfd_tic54x_arch;
extern const bfd_arch_info_type bfd_tic80_arch;
extern const bfd_arch_info_type bfd_vax_arch;
extern const bfd_arch_info_type bfd_we32k_arch;
*************** static const bfd_arch_info_type * const
*** 307,312 ****
--- 309,315 ----
&bfd_sh_arch,
&bfd_sparc_arch,
&bfd_tic30_arch,
+ &bfd_tic54x_arch,
&bfd_tic80_arch,
&bfd_vax_arch,
&bfd_we32k_arch,
Index: bfd/bfd-in2.h
===================================================================
RCS file: /cvs/src/src/bfd/bfd-in2.h,v
retrieving revision 1.38
diff -d -c -p -r1.38 bfd-in2.h
*** bfd-in2.h 2000/04/07 00:58:05 1.38
--- bfd-in2.h 2000/04/07 13:20:14
*************** enum bfd_architecture
*** 1407,1412 ****
--- 1407,1413 ----
bfd_arch_ns32k, /* National Semiconductors ns32000 */
bfd_arch_w65, /* WDC 65816 */
bfd_arch_tic30, /* Texas Instruments TMS320C30 */
+ bfd_arch_tic54x, /* Texas Instruments TMS320C54X */
bfd_arch_tic80, /* TI TMS320c80 (MVP) */
bfd_arch_v850, /* NEC V850 */
#define bfd_mach_v850 0
*************** instruction. */
*** 2280,2285 ****
--- 2281,2310 ----
significant 8 bits of a 24 bit word are placed into the least
significant 8 bits of the opcode. */
BFD_RELOC_TIC30_LDP,
+
+ /* This is a 7bit reloc for the tms320c54x, where the least
+ significant 7 bits of a 16 bit word are placed into the least
+ significant 7 bits of the opcode. */
+ BFD_RELOC_TIC54X_PARTLS7,
+
+ /* This is a 9bit DP reloc for the tms320c54x, where the most
+ significant 9 bits of a 16 bit word are placed into the least
+ significant 9 bits of the opcode. */
+ BFD_RELOC_TIC54X_PARTMS9,
+
+ /* This is an extended address 23-bit reloc for the tms320c54x. */
+ BFD_RELOC_TIC54X_23,
+
+ /* This is a 16-bit reloc for the tms320c54x, where the least
+ significant 16 bits of a 23-bit extended address are placed into
+ the opcode. */
+ BFD_RELOC_TIC54X_16_OF_23,
+
+ /* This is a reloc for the tms320c54x, where the most
+ significant 7 bits of a 23-bit extended address are placed into
+ the opcode. */
+ BFD_RELOC_TIC54X_MS7_OF_23,
+
/* This is a 48 bit reloc for the FR30 that stores 32 bits. */
BFD_RELOC_FR30_48,
Index: bfd/coffcode.h
===================================================================
RCS file: /cvs/src/src/bfd/coffcode.h,v
retrieving revision 1.34
diff -d -c -p -r1.34 coffcode.h
*** coffcode.h 2000/04/07 00:58:05 1.34
--- coffcode.h 2000/04/07 13:20:15
*************** sec_to_styp_flags (sec_name, sec_flags)
*** 398,404 ****
--- 398,408 ----
}
else if (!strncmp (sec_name, ".stab", 5))
{
+ #ifdef COFF_ALIGN_IN_S_FLAGS
+ styp_flags = STYP_DSECT;
+ #else
styp_flags = STYP_INFO;
+ #endif
}
#ifdef RS6000COFF_C
else if (!strcmp (sec_name, _PAD))
*************** coff_set_alignment_hook (abfd, section,
*** 1520,1528 ****
break;
#endif
#ifdef TIC80COFF
! /* TI tools hijack bits 8-11 for the alignment */
i = (hdr->s_flags >> 8) & 0xF ;
#endif
section->alignment_power = i;
}
--- 1524,1535 ----
break;
#endif
#ifdef TIC80COFF
! /* TI tools puts the alignment power in bits 8-11 */
i = (hdr->s_flags >> 8) & 0xF ;
#endif
+ #ifdef COFF_DECODE_ALIGNMENT
+ i = COFF_DECODE_ALIGNMENT(hdr->s_flags);
+ #endif
section->alignment_power = i;
}
*************** coff_set_arch_mach_hook (abfd, filehdr)
*** 2035,2040 ****
--- 2042,2077 ----
break;
#endif
+ #ifdef TICOFF0MAGIC
+ #ifdef TICOFF_TARGET_ARCH
+ /* this TI COFF section should be used by all new TI COFF v0 targets */
+ case TICOFF0MAGIC:
+ arch = TICOFF_TARGET_ARCH;
+ break;
+ #endif
+ #endif
+
+ #ifdef TICOFF1MAGIC
+ /* this TI COFF section should be used by all new TI COFF v1/2 targets */
+ /* TI COFF1 and COFF2 use the target_id field to specify which arch */
+ case TICOFF1MAGIC:
+ case TICOFF2MAGIC:
+ switch (internal_f->f_target_id)
+ {
+ #ifdef TI_TARGET_ID
+ case TI_TARGET_ID:
+ arch = TICOFF_TARGET_ARCH;
+ break;
+ #endif
+ default:
+ (*_bfd_error_handler)
+ (_("Unrecognized TI COFF target id '0x%x'"),
+ internal_f->f_target_id);
+ break;
+ }
+ break;
+ #endif
+
#ifdef TIC80_ARCH_MAGIC
case TIC80_ARCH_MAGIC:
arch = bfd_arch_tic80;
*************** coff_set_flags (abfd, magicp, flagsp)
*** 2427,2432 ****
--- 2464,2496 ----
*magicp = TIC30MAGIC;
return true;
#endif
+
+ #ifdef TICOFF_DEFAULT_MAGIC
+ case TICOFF_TARGET_ARCH:
+ /* if there's no indication of which version we want, use the default */
+ if (!abfd->xvec )
+ *magicp = TICOFF_DEFAULT_MAGIC;
+ else
+ {
+ /* we may want to output in a different COFF version */
+ switch (abfd->xvec->name[4])
+ {
+ case '0':
+ *magicp = TICOFF0MAGIC;
+ break;
+ case '1':
+ *magicp = TICOFF1MAGIC;
+ break;
+ case '2':
+ *magicp = TICOFF2MAGIC;
+ break;
+ default:
+ return false;
+ }
+ }
+ return true;
+ #endif
+
#ifdef TIC80_ARCH_MAGIC
case bfd_arch_tic80:
*magicp = TIC80_ARCH_MAGIC;
*************** sort_by_secaddr (arg1, arg2)
*** 2661,2667 ****
#ifndef I960
#define ALIGN_SECTIONS_IN_FILE
#endif
! #ifdef TIC80COFF
#undef ALIGN_SECTIONS_IN_FILE
#endif
--- 2725,2731 ----
#ifndef I960
#define ALIGN_SECTIONS_IN_FILE
#endif
! #if defined(TIC80COFF) || defined(TICOFF)
#undef ALIGN_SECTIONS_IN_FILE
#endif
*************** coff_write_object_contents (abfd)
*** 3253,3262 ****
section.s_align = (current->alignment_power
? 1 << current->alignment_power
: 0);
! #else
! #ifdef TIC80COFF
section.s_flags |= (current->alignment_power & 0xF) << 8;
#endif
#endif
#ifdef COFF_IMAGE_WITH_PE
--- 3317,3329 ----
section.s_align = (current->alignment_power
? 1 << current->alignment_power
: 0);
! #endif
! #ifdef TIC80COFF
! /* TI COFF puts the alignment power in bits 8-11 of the flags */
section.s_flags |= (current->alignment_power & 0xF) << 8;
#endif
+ #ifdef COFF_ENCODE_ALIGNMENT
+ COFF_ENCODE_ALIGNMENT(section, current->alignment_power);
#endif
#ifdef COFF_IMAGE_WITH_PE
*************** coff_write_object_contents (abfd)
*** 3446,3451 ****
--- 3513,3523 ----
internal_f.f_flags |= F_AR32W;
#endif
+ #ifdef TI_TARGET_ID
+ /* target id is used in TI COFF v1 and later; COFF0 won't use this field,
+ but it doesn't hurt to set it internally */
+ internal_f.f_target_id = TI_TARGET_ID;
+ #endif
#ifdef TIC80_TARGET_ID
internal_f.f_target_id = TIC80_TARGET_ID;
#endif
*************** coff_write_object_contents (abfd)
*** 3487,3492 ****
--- 3559,3568 ----
internal_a.magic = NMAGIC; /* Assume separate i/d */
#define __A_MAGIC_SET__
#endif /* A29K */
+ #ifdef TICOFF_AOUT_MAGIC
+ internal_a.magic = TICOFF_AOUT_MAGIC;
+ #define __A_MAGIC_SET__
+ #endif
#ifdef TIC80COFF
internal_a.magic = TIC80_ARCH_MAGIC;
#define __A_MAGIC_SET__
*************** coff_slurp_symbol_table (abfd)
*** 4220,4226 ****
#endif
case C_REGPARM: /* register parameter */
case C_REG: /* register variable */
! #ifndef TIC80COFF
#ifdef C_AUTOARG
case C_AUTOARG: /* 960-specific storage class */
#endif
--- 4296,4303 ----
#endif
case C_REGPARM: /* register parameter */
case C_REG: /* register variable */
! /* C_AUTOARG conflictes with TI COFF C_UEXT */
! #if !defined (TIC80COFF) && !defined (TICOFF)
#ifdef C_AUTOARG
case C_AUTOARG: /* 960-specific storage class */
#endif
*************** coff_slurp_symbol_table (abfd)
*** 4347,4354 ****
/* NT uses 0x67 for a weak symbol, not C_ALIAS. */
case C_ALIAS: /* duplicate tag */
#endif
! /* New storage classes for TIc80 */
! #ifdef TIC80COFF
case C_UEXT: /* Tentative external definition */
#endif
case C_EXTLAB: /* External load time label */
--- 4424,4431 ----
/* NT uses 0x67 for a weak symbol, not C_ALIAS. */
case C_ALIAS: /* duplicate tag */
#endif
! /* New storage classes for TI COFF */
! #if defined(TIC80COFF) || defined(TICOFF)
case C_UEXT: /* Tentative external definition */
#endif
case C_EXTLAB: /* External load time label */
Index: bfd/config.bfd
===================================================================
RCS file: /cvs/src/src/bfd/config.bfd,v
retrieving revision 1.22
diff -d -c -p -r1.22 config.bfd
*** config.bfd 2000/03/27 08:39:12 1.22
--- config.bfd 2000/04/07 13:20:15
*************** arm*) targ_archs=bfd_arm_arch ;;
*** 33,38 ****
--- 33,39 ----
strongarm*) targ_archs=bfd_arm_arch ;;
thumb*) targ_archs=bfd_arm_arch ;;
c30*) targ_archs=bfd_tic30_arch ;;
+ c54x*) targ_archs=bfd_tic54x_arch ;;
hppa*) targ_archs=bfd_hppa_arch ;;
i[3456]86) targ_archs=bfd_i386_arch ;;
i370) targ_archs=bfd_i370_arch ;;
*************** case "${targ}" in
*** 184,189 ****
--- 185,196 ----
;;
c30-*-*coff* | tic30-*-*coff*)
targ_defvec=tic30_coff_vec
+ ;;
+
+ c54x*-*-*coff* | tic54x-*-*coff*)
+ targ_defvec=tic54x_coff1_vec
+ targ_selvecs="tic54x_coff1_beh_vec tic54x_coff2_vec tic54x_coff2_beh_vec tic54x_coff0_vec tic54x_coff0_beh_vec"
+ targ_underscore=yes
;;
d10v-*-*)
Index: bfd/configure
===================================================================
RCS file: /cvs/src/src/bfd/configure,v
retrieving revision 1.21
diff -d -c -p -r1.21 configure
*** configure 2000/04/03 21:48:31 1.21
--- configure 2000/04/07 13:20:16
*************** do
*** 5213,5218 ****
--- 5213,5224 ----
tekhex_vec) tb="$tb tekhex.lo" ;;
tic30_aout_vec) tb="$tb aout-tic30.lo" ;;
tic30_coff_vec) tb="$tb coff-tic30.lo" ;;
+ tic54x_coff0_vec) tb="$tb coff-tic54x.lo" ;;
+ tic54x_coff0_beh_vec) tb="$tb coff-tic54x.lo" ;;
+ tic54x_coff1_vec) tb="$tb coff-tic54x.lo" ;;
+ tic54x_coff1_beh_vec) tb="$tb coff-tic54x.lo" ;;
+ tic54x_coff2_vec) tb="$tb coff-tic54x.lo" ;;
+ tic54x_coff2_beh_vec) tb="$tb coff-tic54x.lo" ;;
tic80coff_vec) tb="$tb coff-tic80.lo cofflink.lo" ;;
versados_vec) tb="$tb versados.lo" ;;
vms_alpha_vec) tb="$tb vms.lo vms-hdr.lo vms-gsd.lo vms-tir.lo vms-misc.lo"
Index: bfd/configure.in
===================================================================
RCS file: /cvs/src/src/bfd/configure.in,v
retrieving revision 1.16
diff -d -c -p -r1.16 configure.in
*** configure.in 2000/04/03 21:48:31 1.16
--- configure.in 2000/04/07 13:20:16
*************** do
*** 574,579 ****
--- 574,585 ----
tekhex_vec) tb="$tb tekhex.lo" ;;
tic30_aout_vec) tb="$tb aout-tic30.lo" ;;
tic30_coff_vec) tb="$tb coff-tic30.lo" ;;
+ tic54x_coff0_vec) tb="$tb coff-tic54x.lo" ;;
+ tic54x_coff0_beh_vec) tb="$tb coff-tic54x.lo" ;;
+ tic54x_coff1_vec) tb="$tb coff-tic54x.lo" ;;
+ tic54x_coff1_beh_vec) tb="$tb coff-tic54x.lo" ;;
+ tic54x_coff2_vec) tb="$tb coff-tic54x.lo" ;;
+ tic54x_coff2_beh_vec) tb="$tb coff-tic54x.lo" ;;
tic80coff_vec) tb="$tb coff-tic80.lo cofflink.lo" ;;
versados_vec) tb="$tb versados.lo" ;;
vms_alpha_vec) tb="$tb vms.lo vms-hdr.lo vms-gsd.lo vms-tir.lo vms-misc.lo"
Index: bfd/libbfd.h
===================================================================
RCS file: /cvs/src/src/bfd/libbfd.h,v
retrieving revision 1.15
diff -d -c -p -r1.15 libbfd.h
*** libbfd.h 2000/04/05 21:23:04 1.15
--- libbfd.h 2000/04/07 13:20:16
*************** static const char *const bfd_reloc_code_
*** 859,864 ****
--- 859,869 ----
"BFD_RELOC_MN10300_32_PCREL",
"BFD_RELOC_MN10300_16_PCREL",
"BFD_RELOC_TIC30_LDP",
+ "BFD_RELOC_TIC54X_PARTLS7",
+ "BFD_RELOC_TIC54X_PARTMS9",
+ "BFD_RELOC_TIC54X_23",
+ "BFD_RELOC_TIC54X_16_OF_23",
+ "BFD_RELOC_TIC54X_MS7_OF_23",
"BFD_RELOC_FR30_48",
"BFD_RELOC_FR30_20",
"BFD_RELOC_FR30_6_IN_4",
Index: bfd/reloc.c
===================================================================
RCS file: /cvs/src/src/bfd/reloc.c,v
retrieving revision 1.17
diff -d -c -p -r1.17 reloc.c
*** reloc.c 2000/04/05 21:23:04 1.17
--- reloc.c 2000/04/07 13:20:17
*************** ENUMDOC
*** 2539,2544 ****
--- 2539,2579 ----
significant 8 bits of a 24 bit word are placed into the least
significant 8 bits of the opcode.
+ COMMENT
+ ENUM
+ BFD_RELOC_TIC54X_PARTLS7
+ ENUMDOC
+ This is a 7bit reloc for the tms320c54x, where the least
+ significant 7 bits of a 16 bit word are placed into the least
+ significant 7 bits of the opcode.
+
+ ENUM
+ BFD_RELOC_TIC54X_PARTMS9
+ ENUMDOC
+ This is a 9bit DP reloc for the tms320c54x, where the most
+ significant 9 bits of a 16 bit word are placed into the least
+ significant 9 bits of the opcode.
+
+ ENUM
+ BFD_RELOC_TIC54X_23
+ ENUMDOC
+ This is an extended address 23-bit reloc for the tms320c54x.
+
+ ENUM
+ BFD_RELOC_TIC54X_16_OF_23
+ ENUMDOC
+ This is a 16-bit reloc for the tms320c54x, where the least
+ significant 16 bits of a 23-bit extended address are placed into
+ the opcode.
+
+ ENUM
+ BFD_RELOC_TIC54X_MS7_OF_23
+ ENUMDOC
+ This is a reloc for the tms320c54x, where the most
+ significant 7 bits of a 23-bit extended address are placed into
+ the opcode.
+ COMMENT
+
ENUM
BFD_RELOC_FR30_48
ENUMDOC
Index: bfd/targets.c
===================================================================
RCS file: /cvs/src/src/bfd/targets.c,v
retrieving revision 1.14
diff -d -c -p -r1.14 targets.c
*** targets.c 2000/03/27 08:39:12 1.14
--- targets.c 2000/04/07 13:20:17
*************** extern const bfd_target sunos_big_vec;
*** 625,630 ****
--- 625,636 ----
extern const bfd_target tekhex_vec;
extern const bfd_target tic30_aout_vec;
extern const bfd_target tic30_coff_vec;
+ extern const bfd_target tic54x_coff0_vec;
+ extern const bfd_target tic54x_coff0_beh_vec;
+ extern const bfd_target tic54x_coff1_vec;
+ extern const bfd_target tic54x_coff1_beh_vec;
+ extern const bfd_target tic54x_coff2_vec;
+ extern const bfd_target tic54x_coff2_beh_vec;
extern const bfd_target tic80coff_vec;
extern const bfd_target vaxnetbsd_vec;
extern const bfd_target versados_vec;
*************** const bfd_target * const bfd_target_vect
*** 862,867 ****
--- 868,879 ----
&aout0_big_vec,
&tic30_aout_vec,
&tic30_coff_vec,
+ &tic54x_coff0_vec,
+ &tic54x_coff0_beh_vec,
+ &tic54x_coff1_vec,
+ &tic54x_coff1_beh_vec,
+ &tic54x_coff2_vec,
+ &tic54x_coff2_beh_vec,
&tic80coff_vec,
&vaxnetbsd_vec,
&versados_vec,
Index: include/coff/ChangeLog
===================================================================
RCS file: /cvs/src/src/include/coff/ChangeLog,v
retrieving revision 1.15
diff -d -c -p -r1.15 ChangeLog
*** ChangeLog 2000/04/05 21:23:02 1.15
--- ChangeLog 2000/04/07 13:20:17
***************
*** 1,3 ****
--- 1,9 ----
+ 2000-04-07 Timothy Wall <twall@cygnus.com>
+
+ * internal.h: Fix some comments related to TI COFF (instead of tic80).
+ * ti.h: New.
+ * tic54x.h: New.
+
Wed Apr 5 22:08:41 2000 J"orn Rennecke <amylaar@cygnus.co.uk>
* sh.h (R_SH_LOOP_START, R_SH_LOOP_END): Define.
Index: include/coff/internal.h
===================================================================
RCS file: /cvs/src/src/include/coff/internal.h,v
retrieving revision 1.5
diff -d -c -p -r1.5 internal.h
*** internal.h 2000/03/15 21:29:17 1.5
--- internal.h 2000/04/07 13:20:17
*************** struct internal_filehdr
*** 53,59 ****
long f_nsyms; /* number of symtab entries */
unsigned short f_opthdr; /* sizeof(optional hdr) */
unsigned short f_flags; /* flags */
! unsigned short f_target_id; /* (TIc80 specific) */
};
--- 53,59 ----
long f_nsyms; /* number of symtab entries */
unsigned short f_opthdr; /* sizeof(optional hdr) */
unsigned short f_flags; /* flags */
! unsigned short f_target_id; /* (TI COFF specific) */
};
*************** struct internal_aouthdr
*** 222,228 ****
#define C_WEAKEXT 127 /* weak symbol -- GNU extension */
! /* New storage classes for TIc80 */
#define C_UEXT 19 /* Tentative external definition */
#define C_STATLAB 20 /* Static load time label */
#define C_EXTLAB 21 /* External load time label */
--- 222,228 ----
#define C_WEAKEXT 127 /* weak symbol -- GNU extension */
! /* New storage classes for TI COFF */
#define C_UEXT 19 /* Tentative external definition */
#define C_STATLAB 20 /* Static load time label */
#define C_EXTLAB 21 /* External load time label */