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https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=ff6054520cc86ac2f34c21bcc2e44ede50b56cdc
commit ff6054520cc86ac2f34c21bcc2e44ede50b56cdc
Author: Sudakshina Das <sudi.das@arm.com>
Date: Wed Sep 26 11:00:49 2018 +0100
[PATCH, BINUTILS, AARCH64, 7/9] Add BTI instruction
This patch is part of the patch series to add support for ARMv8.5-A
extensions.
(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/docs/ddi0596/a/a64-base-instructions-alphabetic-order/bti-branch-target-identification)
The Branch Target Identification instructions (BTI) are allocated to
existing HINT space, using HINT numbers 32, 34, 36, 38, such that
bits[7:6] of the instruction identify the compatibility of the BTI
instruction to different branches.
BTI {<targets>}
where <targets> one of the following, specifying which type of
indirection is allowed:
j : Can be a target of any BR Xn isntruction.
c : Can be a target of any BLR Xn and BR {X16|X17}.
jc: Can be a target of any free branch.
A BTI instruction without any <targets> is the strictest of all and
can not be a target of nay free branch.
*** include/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* opcode/aarch64.h (AARCH64_FEATURE_BTI): New.
(AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_BTI by default.
(aarch64_opnd): Add AARCH64_OPND_BTI_TARGET.
(HINT_OPD_CSYNC, HINT_OPD_C, HINT_OPD_J): New macros to
define HINT #imm values.
(HINT_OPD_JC, HINT_OPD_NULL): Likewise.
*** opcodes/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* aarch64-opc.h (HINT_OPD_NOPRINT, HINT_ENCODE): New.
(HINT_FLAG, HINT_VALUE): New macros to encode NO_PRINT flag
with the hint immediate.
* aarch64-opc.c (aarch64_hint_options): New entries for
c, j, jc and default (with HINT_OPD_F_NOPRINT flag) for BTI.
(aarch64_print_operand): Add case for AARCH64_OPND_BTI_TARGET
while checking for HINT_OPD_F_NOPRINT flag.
* aarch64-dis.c (aarch64_ext_hint): Use new HINT_VALUE to
extract value.
* aarch64-tbl.h (aarch64_feature_bti, BTI, BTI_INSN): New.
(aarch64_opcode_table): Add entry for BTI.
(AARCH64_OPERANDS): Add new description for BTI targets.
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Regenerate.
* aarch64-opc-2.c: Regenerate.
*** gas/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* config/tc-aarch64.c (parse_bti_operand): New.
(process_omitted_operand): Add case for AARCH64_OPND_BTI_TARGET.
(parse_operands): Likewise.
* testsuite/gas/aarch64/system.d: Update for BTI.
* testsuite/gas/aarch64/bti.s: New.
* testsuite/gas/aarch64/bti.d: New.
* testsuite/gas/aarch64/illegal-bti.d: New.
* testsuite/gas/aarch64/illegal-bti.l: New.
Diff:
---
gas/ChangeLog | 11 +
gas/config/tc-aarch64.c | 52 +
gas/testsuite/gas/aarch64/bti.d | 12 +
gas/testsuite/gas/aarch64/bti.s | 8 +
gas/testsuite/gas/aarch64/illegal-bti.d | 3 +
gas/testsuite/gas/aarch64/illegal-bti.l | 5 +
gas/testsuite/gas/aarch64/system.d | 8 +-
include/ChangeLog | 9 +
include/opcode/aarch64.h | 13 +-
opcodes/ChangeLog | 18 +
opcodes/aarch64-asm-2.c | 304 ++---
opcodes/aarch64-dis-2.c | 1948 ++++++++++++++++---------------
opcodes/aarch64-dis.c | 2 +-
opcodes/aarch64-opc-2.c | 17 +-
opcodes/aarch64-opc.c | 13 +-
opcodes/aarch64-opc.h | 8 +
opcodes/aarch64-tbl.h | 8 +
17 files changed, 1298 insertions(+), 1141 deletions(-)
diff --git a/gas/ChangeLog b/gas/ChangeLog
index dab1a01..6ed2407 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,16 @@
2018-10-09 Sudakshina Das <sudi.das@arm.com>
+ * config/tc-aarch64.c (parse_bti_operand): New.
+ (process_omitted_operand): Add case for AARCH64_OPND_BTI_TARGET.
+ (parse_operands): Likewise.
+ * testsuite/gas/aarch64/system.d: Update for BTI.
+ * testsuite/gas/aarch64/bti.s: New.
+ * testsuite/gas/aarch64/bti.d: New.
+ * testsuite/gas/aarch64/illegal-bti.d: New.
+ * testsuite/gas/aarch64/illegal-bti.l: New.
+
+2018-10-09 Sudakshina Das <sudi.das@arm.com>
+
* config/tc-aarch64.c (aarch64_features): New "rng" option.
* doc/c-aarch64.texi: Document the same.
* testsuite/gas/aarch64/sysreg-4.s: Test both instructions.
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index b09c416..582c3ec 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -3933,6 +3933,47 @@ parse_barrier_psb (char **str,
return 0;
}
+/* Parse an operand for BTI. Set *HINT_OPT to the hint-option record
+ return 0 if successful. Otherwise return PARSE_FAIL. */
+
+static int
+parse_bti_operand (char **str,
+ const struct aarch64_name_value_pair ** hint_opt)
+{
+ char *p, *q;
+ const struct aarch64_name_value_pair *o;
+
+ p = q = *str;
+ while (ISALPHA (*q))
+ q++;
+
+ o = hash_find_n (aarch64_hint_opt_hsh, p, q - p);
+ if (!o)
+ {
+ set_fatal_syntax_error
+ ( _("unknown option to BTI"));
+ return PARSE_FAIL;
+ }
+
+ switch (o->value)
+ {
+ /* Valid BTI operands. */
+ case HINT_OPD_C:
+ case HINT_OPD_J:
+ case HINT_OPD_JC:
+ break;
+
+ default:
+ set_syntax_error
+ (_("unknown option to BTI"));
+ return PARSE_FAIL;
+ }
+
+ *str = q;
+ *hint_opt = o;
+ return 0;
+}
+
/* Parse a system register or a PSTATE field name for an MSR/MRS instruction.
Returns the encoding for the option, or PARSE_FAIL.
@@ -5151,6 +5192,11 @@ process_omitted_operand (enum aarch64_opnd type, const aarch64_opcode *opcode,
case AARCH64_OPND_BARRIER_ISB:
operand->barrier = aarch64_barrier_options + default_value;
+ break;
+
+ case AARCH64_OPND_BTI_TARGET:
+ operand->hint_option = aarch64_hint_options + default_value;
+ break;
default:
break;
@@ -6483,6 +6529,12 @@ sys_reg_ins:
goto failure;
break;
+ case AARCH64_OPND_BTI_TARGET:
+ val = parse_bti_operand (&str, &(info->hint_option));
+ if (val == PARSE_FAIL)
+ goto failure;
+ break;
+
default:
as_fatal (_("unhandled operand code %d"), operands[i]);
}
diff --git a/gas/testsuite/gas/aarch64/bti.d b/gas/testsuite/gas/aarch64/bti.d
new file mode 100644
index 0000000..4f65ee5
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/bti.d
@@ -0,0 +1,12 @@
+#as: -march=armv8.5-a
+#objdump: -dr
+
+.*: file format .*
+
+Disassembly of section \.text:
+
+0+ <.*>:
+.*: d503241f bti
+.*: d503245f bti c
+.*: d503249f bti j
+.*: d50324df bti jc
diff --git a/gas/testsuite/gas/aarch64/bti.s b/gas/testsuite/gas/aarch64/bti.s
new file mode 100644
index 0000000..42f199d
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/bti.s
@@ -0,0 +1,8 @@
+// Test file for AArch64 bti.
+
+ .text
+
+ bti
+ bti c
+ bti j
+ bti jc
diff --git a/gas/testsuite/gas/aarch64/illegal-bti.d b/gas/testsuite/gas/aarch64/illegal-bti.d
new file mode 100644
index 0000000..174d97a
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/illegal-bti.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: bti.s
+#error_output: illegal-bti.l
diff --git a/gas/testsuite/gas/aarch64/illegal-bti.l b/gas/testsuite/gas/aarch64/illegal-bti.l
new file mode 100644
index 0000000..354c6f2
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/illegal-bti.l
@@ -0,0 +1,5 @@
+[^:]*: Assembler messages:
+[^:]*:[0-9]+: Error: selected processor does not support `bti'
+[^:]*:[0-9]+: Error: selected processor does not support `bti c'
+[^:]*:[0-9]+: Error: selected processor does not support `bti j'
+[^:]*:[0-9]+: Error: selected processor does not support `bti jc'
diff --git a/gas/testsuite/gas/aarch64/system.d b/gas/testsuite/gas/aarch64/system.d
index ca908ef..291d04d 100644
--- a/gas/testsuite/gas/aarch64/system.d
+++ b/gas/testsuite/gas/aarch64/system.d
@@ -44,13 +44,13 @@ Disassembly of section \.text:
.*: d50323bf (hint #0x1d|autiasp)
.*: d50323df (hint #0x1e|autibz)
.*: d50323ff (hint #0x1f|autibsp)
-.*: d503241f hint #0x20
+.*: d503241f (hint #0x20|bti)
.*: d503243f hint #0x21
-.*: d503245f hint #0x22
+.*: d503245f (hint #0x22|bti c)
.*: d503247f hint #0x23
-.*: d503249f hint #0x24
+.*: d503249f (hint #0x24|bti j)
.*: d50324bf hint #0x25
-.*: d50324df hint #0x26
+.*: d50324df (hint #0x26|bti jc)
.*: d50324ff hint #0x27
.*: d503251f hint #0x28
.*: d503253f hint #0x29
diff --git a/include/ChangeLog b/include/ChangeLog
index ffd6592..f57d205 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,5 +1,14 @@
2018-10-09 Sudakshina Das <sudi.das@arm.com>
+ * opcode/aarch64.h (AARCH64_FEATURE_BTI): New.
+ (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_BTI by default.
+ (aarch64_opnd): Add AARCH64_OPND_BTI_TARGET.
+ (HINT_OPD_CSYNC, HINT_OPD_C, HINT_OPD_J): New macros to
+ define HINT #imm values.
+ (HINT_OPD_JC, HINT_OPD_NULL): Likewise.
+
+2018-10-09 Sudakshina Das <sudi.das@arm.com>
+
* opcode/aarch64.h (AARCH64_FEATURE_RNG): New.
2018-10-09 Sudakshina Das <sudi.das@arm.com>
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index b4987de..144ec7e 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -76,6 +76,8 @@ typedef uint32_t aarch64_insn;
#define AARCH64_FEATURE_CVADP 0x40000000000ULL
/* Random Number instructions. */
#define AARCH64_FEATURE_RNG 0x80000000000ULL
+/* BTI instructions. */
+#define AARCH64_FEATURE_BTI 0x100000000000ULL
/* Architectures are the sum of the base and extensions. */
#define AARCH64_ARCH_V8 AARCH64_FEATURE (AARCH64_FEATURE_V8, \
@@ -105,7 +107,8 @@ typedef uint32_t aarch64_insn;
| AARCH64_FEATURE_FRINTTS \
| AARCH64_FEATURE_SB \
| AARCH64_FEATURE_PREDRES \
- | AARCH64_FEATURE_CVADP)
+ | AARCH64_FEATURE_CVADP \
+ | AARCH64_FEATURE_BTI)
#define AARCH64_ARCH_NONE AARCH64_FEATURE (0, 0)
@@ -285,6 +288,7 @@ enum aarch64_opnd
AARCH64_OPND_BARRIER_ISB, /* Barrier operand for ISB. */
AARCH64_OPND_PRFOP, /* Prefetch operation. */
AARCH64_OPND_BARRIER_PSB, /* Barrier operand for PSB. */
+ AARCH64_OPND_BTI_TARGET, /* BTI {<target>}. */
AARCH64_OPND_SVE_ADDR_RI_S4x16, /* SVE [<Xn|SP>, #<simm4>*16]. */
AARCH64_OPND_SVE_ADDR_RI_S4xVL, /* SVE [<Xn|SP>, #<simm4>, MUL VL]. */
@@ -1090,6 +1094,13 @@ struct aarch64_inst
aarch64_opnd_info operands[AARCH64_MAX_OPND_NUM];
};
+/* Defining the HINT #imm values for the aarch64_hint_options. */
+#define HINT_OPD_CSYNC 0x11
+#define HINT_OPD_C 0x22
+#define HINT_OPD_J 0x24
+#define HINT_OPD_JC 0x26
+#define HINT_OPD_NULL 0x00
+
/* Diagnosis related declaration and interface. */
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 98da818..15c1bac 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,5 +1,23 @@
2018-10-09 Sudakshina Das <sudi.das@arm.com>
+ * aarch64-opc.h (HINT_OPD_NOPRINT, HINT_ENCODE): New.
+ (HINT_FLAG, HINT_VALUE): New macros to encode NO_PRINT flag
+ with the hint immediate.
+ * aarch64-opc.c (aarch64_hint_options): New entries for
+ c, j, jc and default (with HINT_OPD_F_NOPRINT flag) for BTI.
+ (aarch64_print_operand): Add case for AARCH64_OPND_BTI_TARGET
+ while checking for HINT_OPD_F_NOPRINT flag.
+ * aarch64-dis.c (aarch64_ext_hint): Use new HINT_VALUE to
+ extract value.
+ * aarch64-tbl.h (aarch64_feature_bti, BTI, BTI_INSN): New.
+ (aarch64_opcode_table): Add entry for BTI.
+ (AARCH64_OPERANDS): Add new description for BTI targets.
+ * aarch64-asm-2.c: Regenerate.
+ * aarch64-dis-2.c: Regenerate.
+ * aarch64-opc-2.c: Regenerate.
+
+2018-10-09 Sudakshina Das <sudi.das@arm.com>
+
* aarch64-opc.c (aarch64_sys_regs): New entries for
rndr and rndrrs.
(aarch64_sys_reg_supported_p): New check for above.
diff --git a/opcodes/aarch64-asm-2.c b/opcodes/aarch64-asm-2.c
index 221513a..f668e7d 100644
--- a/opcodes/aarch64-asm-2.c
+++ b/opcodes/aarch64-asm-2.c
@@ -422,165 +422,166 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
case 1162: /* movz */
value = 1162; /* --> movz. */
break;
- case 1208: /* autibsp */
- case 1207: /* autibz */
- case 1206: /* autiasp */
- case 1205: /* autiaz */
- case 1204: /* pacibsp */
- case 1203: /* pacibz */
- case 1202: /* paciasp */
- case 1201: /* paciaz */
- case 1182: /* psb */
- case 1181: /* esb */
- case 1180: /* autib1716 */
- case 1179: /* autia1716 */
- case 1178: /* pacib1716 */
- case 1177: /* pacia1716 */
- case 1176: /* xpaclri */
- case 1175: /* sevl */
- case 1174: /* sev */
- case 1173: /* wfi */
- case 1172: /* wfe */
- case 1171: /* yield */
+ case 1209: /* autibsp */
+ case 1208: /* autibz */
+ case 1207: /* autiasp */
+ case 1206: /* autiaz */
+ case 1205: /* pacibsp */
+ case 1204: /* pacibz */
+ case 1203: /* paciasp */
+ case 1202: /* paciaz */
+ case 1183: /* psb */
+ case 1182: /* esb */
+ case 1181: /* autib1716 */
+ case 1180: /* autia1716 */
+ case 1179: /* pacib1716 */
+ case 1178: /* pacia1716 */
+ case 1177: /* xpaclri */
+ case 1176: /* sevl */
+ case 1175: /* sev */
+ case 1174: /* wfi */
+ case 1173: /* wfe */
+ case 1172: /* yield */
+ case 1171: /* bti */
case 1170: /* csdb */
case 1169: /* nop */
case 1168: /* hint */
value = 1168; /* --> hint. */
break;
- case 1186: /* pssbb */
- case 1185: /* ssbb */
- case 1184: /* dsb */
- value = 1184; /* --> dsb. */
- break;
- case 1197: /* cpp */
- case 1196: /* dvp */
- case 1195: /* cfp */
- case 1194: /* tlbi */
- case 1193: /* ic */
- case 1192: /* dc */
- case 1191: /* at */
- case 1190: /* sys */
- value = 1190; /* --> sys. */
- break;
- case 2006: /* bic */
- case 1256: /* and */
- value = 1256; /* --> and. */
+ case 1187: /* pssbb */
+ case 1186: /* ssbb */
+ case 1185: /* dsb */
+ value = 1185; /* --> dsb. */
+ break;
+ case 1198: /* cpp */
+ case 1197: /* dvp */
+ case 1196: /* cfp */
+ case 1195: /* tlbi */
+ case 1194: /* ic */
+ case 1193: /* dc */
+ case 1192: /* at */
+ case 1191: /* sys */
+ value = 1191; /* --> sys. */
+ break;
+ case 2007: /* bic */
+ case 1257: /* and */
+ value = 1257; /* --> and. */
break;
- case 1239: /* mov */
- case 1258: /* and */
- value = 1258; /* --> and. */
+ case 1240: /* mov */
+ case 1259: /* and */
+ value = 1259; /* --> and. */
break;
- case 1243: /* movs */
- case 1259: /* ands */
- value = 1259; /* --> ands. */
+ case 1244: /* movs */
+ case 1260: /* ands */
+ value = 1260; /* --> ands. */
break;
- case 2007: /* cmple */
- case 1294: /* cmpge */
- value = 1294; /* --> cmpge. */
+ case 2008: /* cmple */
+ case 1295: /* cmpge */
+ value = 1295; /* --> cmpge. */
break;
- case 2010: /* cmplt */
- case 1297: /* cmpgt */
- value = 1297; /* --> cmpgt. */
+ case 2011: /* cmplt */
+ case 1298: /* cmpgt */
+ value = 1298; /* --> cmpgt. */
break;
- case 2008: /* cmplo */
- case 1299: /* cmphi */
- value = 1299; /* --> cmphi. */
+ case 2009: /* cmplo */
+ case 1300: /* cmphi */
+ value = 1300; /* --> cmphi. */
break;
- case 2009: /* cmpls */
- case 1302: /* cmphs */
- value = 1302; /* --> cmphs. */
+ case 2010: /* cmpls */
+ case 1303: /* cmphs */
+ value = 1303; /* --> cmphs. */
break;
- case 1236: /* mov */
- case 1324: /* cpy */
- value = 1324; /* --> cpy. */
- break;
- case 1238: /* mov */
+ case 1237: /* mov */
case 1325: /* cpy */
value = 1325; /* --> cpy. */
break;
- case 2017: /* fmov */
- case 1241: /* mov */
+ case 1239: /* mov */
case 1326: /* cpy */
value = 1326; /* --> cpy. */
break;
- case 1231: /* mov */
- case 1338: /* dup */
- value = 1338; /* --> dup. */
+ case 2018: /* fmov */
+ case 1242: /* mov */
+ case 1327: /* cpy */
+ value = 1327; /* --> cpy. */
break;
- case 1233: /* mov */
- case 1230: /* mov */
+ case 1232: /* mov */
case 1339: /* dup */
value = 1339; /* --> dup. */
break;
- case 2016: /* fmov */
- case 1235: /* mov */
+ case 1234: /* mov */
+ case 1231: /* mov */
case 1340: /* dup */
value = 1340; /* --> dup. */
break;
- case 1234: /* mov */
- case 1341: /* dupm */
- value = 1341; /* --> dupm. */
+ case 2017: /* fmov */
+ case 1236: /* mov */
+ case 1341: /* dup */
+ value = 1341; /* --> dup. */
break;
- case 2011: /* eon */
- case 1343: /* eor */
- value = 1343; /* --> eor. */
+ case 1235: /* mov */
+ case 1342: /* dupm */
+ value = 1342; /* --> dupm. */
break;
- case 1244: /* not */
- case 1345: /* eor */
- value = 1345; /* --> eor. */
+ case 2012: /* eon */
+ case 1344: /* eor */
+ value = 1344; /* --> eor. */
break;
- case 1245: /* nots */
- case 1346: /* eors */
- value = 1346; /* --> eors. */
+ case 1245: /* not */
+ case 1346: /* eor */
+ value = 1346; /* --> eor. */
break;
- case 2012: /* facle */
- case 1351: /* facge */
- value = 1351; /* --> facge. */
+ case 1246: /* nots */
+ case 1347: /* eors */
+ value = 1347; /* --> eors. */
break;
- case 2013: /* faclt */
- case 1352: /* facgt */
- value = 1352; /* --> facgt. */
+ case 2013: /* facle */
+ case 1352: /* facge */
+ value = 1352; /* --> facge. */
break;
- case 2014: /* fcmle */
- case 1365: /* fcmge */
- value = 1365; /* --> fcmge. */
+ case 2014: /* faclt */
+ case 1353: /* facgt */
+ value = 1353; /* --> facgt. */
break;
- case 2015: /* fcmlt */
- case 1367: /* fcmgt */
- value = 1367; /* --> fcmgt. */
+ case 2015: /* fcmle */
+ case 1366: /* fcmge */
+ value = 1366; /* --> fcmge. */
break;
- case 1228: /* fmov */
- case 1373: /* fcpy */
- value = 1373; /* --> fcpy. */
+ case 2016: /* fcmlt */
+ case 1368: /* fcmgt */
+ value = 1368; /* --> fcmgt. */
break;
- case 1227: /* fmov */
- case 1396: /* fdup */
- value = 1396; /* --> fdup. */
+ case 1229: /* fmov */
+ case 1374: /* fcpy */
+ value = 1374; /* --> fcpy. */
break;
- case 1229: /* mov */
- case 1727: /* orr */
- value = 1727; /* --> orr. */
+ case 1228: /* fmov */
+ case 1397: /* fdup */
+ value = 1397; /* --> fdup. */
break;
- case 2018: /* orn */
+ case 1230: /* mov */
case 1728: /* orr */
value = 1728; /* --> orr. */
break;
- case 1232: /* mov */
- case 1730: /* orr */
- value = 1730; /* --> orr. */
+ case 2019: /* orn */
+ case 1729: /* orr */
+ value = 1729; /* --> orr. */
break;
- case 1242: /* movs */
- case 1731: /* orrs */
- value = 1731; /* --> orrs. */
+ case 1233: /* mov */
+ case 1731: /* orr */
+ value = 1731; /* --> orr. */
break;
- case 1237: /* mov */
- case 1793: /* sel */
- value = 1793; /* --> sel. */
+ case 1243: /* movs */
+ case 1732: /* orrs */
+ value = 1732; /* --> orrs. */
break;
- case 1240: /* mov */
+ case 1238: /* mov */
case 1794: /* sel */
value = 1794; /* --> sel. */
break;
+ case 1241: /* mov */
+ case 1795: /* sel */
+ value = 1795; /* --> sel. */
+ break;
default: return NULL;
}
@@ -622,7 +623,6 @@ aarch64_insert_operand (const aarch64_operand *self,
case 27:
case 28:
case 29:
- case 154:
case 155:
case 156:
case 157:
@@ -632,7 +632,7 @@ aarch64_insert_operand (const aarch64_operand *self,
case 161:
case 162:
case 163:
- case 176:
+ case 164:
case 177:
case 178:
case 179:
@@ -641,8 +641,9 @@ aarch64_insert_operand (const aarch64_operand *self,
case 182:
case 183:
case 184:
- case 188:
- case 191:
+ case 185:
+ case 189:
+ case 192:
return aarch64_ins_regno (self, info, code, inst, errors);
case 13:
return aarch64_ins_reg_extended (self, info, code, inst, errors);
@@ -654,7 +655,7 @@ aarch64_insert_operand (const aarch64_operand *self,
case 31:
case 32:
case 33:
- case 193:
+ case 194:
return aarch64_ins_reglane (self, info, code, inst, errors);
case 34:
return aarch64_ins_reglist (self, info, code, inst, errors);
@@ -686,9 +687,8 @@ aarch64_insert_operand (const aarch64_operand *self,
case 77:
case 78:
case 79:
- case 151:
- case 153:
- case 168:
+ case 152:
+ case 154:
case 169:
case 170:
case 171:
@@ -696,6 +696,7 @@ aarch64_insert_operand (const aarch64_operand *self,
case 173:
case 174:
case 175:
+ case 176:
return aarch64_ins_imm (self, info, code, inst, errors);
case 42:
case 43:
@@ -705,10 +706,10 @@ aarch64_insert_operand (const aarch64_operand *self,
case 46:
return aarch64_ins_advsimd_imm_modified (self, info, code, inst, errors);
case 50:
- case 142:
+ case 143:
return aarch64_ins_fpimm (self, info, code, inst, errors);
case 65:
- case 149:
+ case 150:
return aarch64_ins_limm (self, info, code, inst, errors);
case 66:
return aarch64_ins_aimm (self, info, code, inst, errors);
@@ -718,10 +719,10 @@ aarch64_insert_operand (const aarch64_operand *self,
return aarch64_ins_fbits (self, info, code, inst, errors);
case 70:
case 71:
- case 147:
+ case 148:
return aarch64_ins_imm_rotate2 (self, info, code, inst, errors);
case 72:
- case 146:
+ case 147:
return aarch64_ins_imm_rotate1 (self, info, code, inst, errors);
case 73:
case 74:
@@ -759,24 +760,24 @@ aarch64_insert_operand (const aarch64_operand *self,
case 99:
return aarch64_ins_prfop (self, info, code, inst, errors);
case 100:
- return aarch64_ins_hint (self, info, code, inst, errors);
case 101:
- return aarch64_ins_sve_addr_ri_s4 (self, info, code, inst, errors);
+ return aarch64_ins_hint (self, info, code, inst, errors);
case 102:
+ return aarch64_ins_sve_addr_ri_s4 (self, info, code, inst, errors);
case 103:
case 104:
case 105:
- return aarch64_ins_sve_addr_ri_s4xvl (self, info, code, inst, errors);
case 106:
- return aarch64_ins_sve_addr_ri_s6xvl (self, info, code, inst, errors);
+ return aarch64_ins_sve_addr_ri_s4xvl (self, info, code, inst, errors);
case 107:
- return aarch64_ins_sve_addr_ri_s9xvl (self, info, code, inst, errors);
+ return aarch64_ins_sve_addr_ri_s6xvl (self, info, code, inst, errors);
case 108:
+ return aarch64_ins_sve_addr_ri_s9xvl (self, info, code, inst, errors);
case 109:
case 110:
case 111:
- return aarch64_ins_sve_addr_ri_u6 (self, info, code, inst, errors);
case 112:
+ return aarch64_ins_sve_addr_ri_u6 (self, info, code, inst, errors);
case 113:
case 114:
case 115:
@@ -789,8 +790,8 @@ aarch64_insert_operand (const aarch64_operand *self,
case 122:
case 123:
case 124:
- return aarch64_ins_sve_addr_rr_lsl (self, info, code, inst, errors);
case 125:
+ return aarch64_ins_sve_addr_rr_lsl (self, info, code, inst, errors);
case 126:
case 127:
case 128:
@@ -798,48 +799,49 @@ aarch64_insert_operand (const aarch64_operand *self,
case 130:
case 131:
case 132:
- return aarch64_ins_sve_addr_rz_xtw (self, info, code, inst, errors);
case 133:
+ return aarch64_ins_sve_addr_rz_xtw (self, info, code, inst, errors);
case 134:
case 135:
case 136:
- return aarch64_ins_sve_addr_zi_u5 (self, info, code, inst, errors);
case 137:
- return aarch64_ins_sve_addr_zz_lsl (self, info, code, inst, errors);
+ return aarch64_ins_sve_addr_zi_u5 (self, info, code, inst, errors);
case 138:
- return aarch64_ins_sve_addr_zz_sxtw (self, info, code, inst, errors);
+ return aarch64_ins_sve_addr_zz_lsl (self, info, code, inst, errors);
case 139:
- return aarch64_ins_sve_addr_zz_uxtw (self, info, code, inst, errors);
+ return aarch64_ins_sve_addr_zz_sxtw (self, info, code, inst, errors);
case 140:
- return aarch64_ins_sve_aimm (self, info, code, inst, errors);
+ return aarch64_ins_sve_addr_zz_uxtw (self, info, code, inst, errors);
case 141:
+ return aarch64_ins_sve_aimm (self, info, code, inst, errors);
+ case 142:
return aarch64_ins_sve_asimm (self, info, code, inst, errors);
- case 143:
- return aarch64_ins_sve_float_half_one (self, info, code, inst, errors);
case 144:
- return aarch64_ins_sve_float_half_two (self, info, code, inst, errors);
+ return aarch64_ins_sve_float_half_one (self, info, code, inst, errors);
case 145:
+ return aarch64_ins_sve_float_half_two (self, info, code, inst, errors);
+ case 146:
return aarch64_ins_sve_float_zero_one (self, info, code, inst, errors);
- case 148:
+ case 149:
return aarch64_ins_inv_limm (self, info, code, inst, errors);
- case 150:
+ case 151:
return aarch64_ins_sve_limm_mov (self, info, code, inst, errors);
- case 152:
+ case 153:
return aarch64_ins_sve_scale (self, info, code, inst, errors);
- case 164:
case 165:
- return aarch64_ins_sve_shlimm (self, info, code, inst, errors);
case 166:
+ return aarch64_ins_sve_shlimm (self, info, code, inst, errors);
case 167:
+ case 168:
return aarch64_ins_sve_shrimm (self, info, code, inst, errors);
- case 185:
case 186:
case 187:
+ case 188:
return aarch64_ins_sve_quad_index (self, info, code, inst, errors);
- case 189:
- return aarch64_ins_sve_index (self, info, code, inst, errors);
case 190:
- case 192:
+ return aarch64_ins_sve_index (self, info, code, inst, errors);
+ case 191:
+ case 193:
return aarch64_ins_sve_reglist (self, info, code, inst, errors);
default: assert (0); abort ();
}
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index 4b54e32..1ce1285 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -2340,7 +2340,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0001100100xxxxxxxxxxxxxxxxxxxxxx
stlurb. */
- return 2060;
+ return 2061;
}
else
{
@@ -2348,7 +2348,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1001100100xxxxxxxxxxxxxxxxxxxxxx
stlur. */
- return 2068;
+ return 2069;
}
}
else
@@ -2359,7 +2359,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0101100100xxxxxxxxxxxxxxxxxxxxxx
stlurh. */
- return 2064;
+ return 2065;
}
else
{
@@ -2367,7 +2367,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1101100100xxxxxxxxxxxxxxxxxxxxxx
stlur. */
- return 2071;
+ return 2072;
}
}
}
@@ -2414,7 +2414,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0001100101xxxxxxxxxxxxxxxxxxxxxx
ldapurb. */
- return 2061;
+ return 2062;
}
else
{
@@ -2422,7 +2422,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1001100101xxxxxxxxxxxxxxxxxxxxxx
ldapur. */
- return 2069;
+ return 2070;
}
}
else
@@ -2433,7 +2433,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0101100101xxxxxxxxxxxxxxxxxxxxxx
ldapurh. */
- return 2065;
+ return 2066;
}
else
{
@@ -2441,7 +2441,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1101100101xxxxxxxxxxxxxxxxxxxxxx
ldapur. */
- return 2072;
+ return 2073;
}
}
}
@@ -2491,7 +2491,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0001100110xxxxxxxxxxxxxxxxxxxxxx
ldapursb. */
- return 2063;
+ return 2064;
}
else
{
@@ -2499,7 +2499,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1001100110xxxxxxxxxxxxxxxxxxxxxx
ldapursw. */
- return 2070;
+ return 2071;
}
}
else
@@ -2508,7 +2508,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x101100110xxxxxxxxxxxxxxxxxxxxxx
ldapursh. */
- return 2067;
+ return 2068;
}
}
else
@@ -2519,7 +2519,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x001100111xxxxxxxxxxxxxxxxxxxxxx
ldapursb. */
- return 2062;
+ return 2063;
}
else
{
@@ -2527,7 +2527,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x101100111xxxxxxxxxxxxxxxxxxxxxx
ldapursh. */
- return 2066;
+ return 2067;
}
}
}
@@ -2920,7 +2920,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx0xx10xxxxxxxxxx
setf8. */
- return 2058;
+ return 2059;
}
else
{
@@ -2928,7 +2928,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx1xx10xxxxxxxxxx
setf16. */
- return 2059;
+ return 2060;
}
}
else
@@ -3074,7 +3074,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010000xxxxxxxxx01xxxxxxxxxx
rmif. */
- return 2057;
+ return 2058;
}
else
{
@@ -3601,7 +3601,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx000000000xxxxxxxxxxxxx
add. */
- return 1249;
+ return 1250;
}
else
{
@@ -3609,7 +3609,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx010000000xxxxxxxxxxxxx
mul. */
- return 1718;
+ return 1719;
}
}
else
@@ -3620,7 +3620,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx001000000xxxxxxxxxxxxx
smax. */
- return 1797;
+ return 1798;
}
else
{
@@ -3628,7 +3628,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx011000000xxxxxxxxxxxxx
orr. */
- return 1729;
+ return 1730;
}
}
}
@@ -3640,7 +3640,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x0100000xxxxxxxxxxxxx
sdiv. */
- return 1788;
+ return 1789;
}
else
{
@@ -3648,7 +3648,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x1100000xxxxxxxxxxxxx
sabd. */
- return 1779;
+ return 1780;
}
}
}
@@ -3662,7 +3662,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x0010000xxxxxxxxxxxxx
smulh. */
- return 1802;
+ return 1803;
}
else
{
@@ -3672,7 +3672,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx001010000xxxxxxxxxxxxx
smin. */
- return 1800;
+ return 1801;
}
else
{
@@ -3680,7 +3680,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx011010000xxxxxxxxxxxxx
and. */
- return 1257;
+ return 1258;
}
}
}
@@ -3690,7 +3690,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0xx110000xxxxxxxxxxxxx
sdivr. */
- return 1789;
+ return 1790;
}
}
}
@@ -3706,7 +3706,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x0001000xxxxxxxxxxxxx
sub. */
- return 1918;
+ return 1919;
}
else
{
@@ -3716,7 +3716,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx001001000xxxxxxxxxxxxx
umax. */
- return 1946;
+ return 1947;
}
else
{
@@ -3724,7 +3724,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx011001000xxxxxxxxxxxxx
eor. */
- return 1344;
+ return 1345;
}
}
}
@@ -3736,7 +3736,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x0101000xxxxxxxxxxxxx
udiv. */
- return 1940;
+ return 1941;
}
else
{
@@ -3744,7 +3744,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x1101000xxxxxxxxxxxxx
uabd. */
- return 1931;
+ return 1932;
}
}
}
@@ -3760,7 +3760,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx000011000xxxxxxxxxxxxx
subr. */
- return 1920;
+ return 1921;
}
else
{
@@ -3768,7 +3768,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx010011000xxxxxxxxxxxxx
umulh. */
- return 1951;
+ return 1952;
}
}
else
@@ -3779,7 +3779,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx001011000xxxxxxxxxxxxx
umin. */
- return 1949;
+ return 1950;
}
else
{
@@ -3787,7 +3787,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx011011000xxxxxxxxxxxxx
bic. */
- return 1269;
+ return 1270;
}
}
}
@@ -3797,7 +3797,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0xx111000xxxxxxxxxxxxx
udivr. */
- return 1941;
+ return 1942;
}
}
}
@@ -3810,7 +3810,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x00x0xxxxx000xxxxxxxxxxxxx
ld1sb. */
- return 1531;
+ return 1532;
}
else
{
@@ -3818,7 +3818,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x01x0xxxxx000xxxxxxxxxxxxx
ld1sh. */
- return 1542;
+ return 1543;
}
}
}
@@ -3830,7 +3830,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x00x0xxxxx000xxxxxxxxxxxxx
ld1sb. */
- return 1535;
+ return 1536;
}
else
{
@@ -3842,7 +3842,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x0xxxxx000xx0xxxxxxxxxx
sdot. */
- return 1790;
+ return 1791;
}
else
{
@@ -3850,7 +3850,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x0xxxxx000xx1xxxxxxxxxx
udot. */
- return 1942;
+ return 1943;
}
}
else
@@ -3859,7 +3859,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x01x0xxxxx000xxxxxxxxxxxxx
ld1sh. */
- return 1546;
+ return 1547;
}
}
}
@@ -3880,7 +3880,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx000000xxxxxxxxxx
add. */
- return 1247;
+ return 1248;
}
else
{
@@ -3888,7 +3888,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx000100xxxxxxxxxx
sqadd. */
- return 1804;
+ return 1805;
}
}
else
@@ -3897,7 +3897,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx000x10xxxxxxxxxx
sqsub. */
- return 1834;
+ return 1835;
}
}
else
@@ -3910,7 +3910,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx000001xxxxxxxxxx
sub. */
- return 1916;
+ return 1917;
}
else
{
@@ -3918,7 +3918,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx000101xxxxxxxxxx
uqadd. */
- return 1952;
+ return 1953;
}
}
else
@@ -3927,7 +3927,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx000x11xxxxxxxxxx
uqsub. */
- return 1982;
+ return 1983;
}
}
}
@@ -3939,7 +3939,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x00x1xxxxx000xxxxxxxxxxxxx
prfb. */
- return 1737;
+ return 1738;
}
else
{
@@ -3947,7 +3947,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x01x1xxxxx000xxxxxxxxxxxxx
ld1sh. */
- return 1543;
+ return 1544;
}
}
}
@@ -3959,7 +3959,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x00x1xxxxx000xxxxxxxxxxxxx
prfb. */
- return 1738;
+ return 1739;
}
else
{
@@ -3973,7 +3973,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0101xxxxx000xx0xxxxxxxxxx
sdot. */
- return 1791;
+ return 1792;
}
else
{
@@ -3981,7 +3981,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0111xxxxx000xx0xxxxxxxxxx
sdot. */
- return 1792;
+ return 1793;
}
}
else
@@ -3992,7 +3992,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0101xxxxx000xx1xxxxxxxxxx
udot. */
- return 1943;
+ return 1944;
}
else
{
@@ -4000,7 +4000,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0111xxxxx000xx1xxxxxxxxxx
udot. */
- return 1944;
+ return 1945;
}
}
}
@@ -4010,7 +4010,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x01x1xxxxx000xxxxxxxxxxxxx
ld1sh. */
- return 1547;
+ return 1548;
}
}
}
@@ -4036,7 +4036,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0000x0100xxxxxxxxxxxxx
asr. */
- return 1265;
+ return 1266;
}
else
{
@@ -4044,7 +4044,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0100x0100xxxxxxxxxxxxx
asr. */
- return 1263;
+ return 1264;
}
}
else
@@ -4053,7 +4053,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x10x0100xxxxxxxxxxxxx
asr. */
- return 1264;
+ return 1265;
}
}
else
@@ -4064,7 +4064,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx00x1x0100xxxxxxxxxxxxx
asrd. */
- return 1266;
+ return 1267;
}
else
{
@@ -4072,7 +4072,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx01x1x0100xxxxxxxxxxxxx
asrr. */
- return 1267;
+ return 1268;
}
}
}
@@ -4090,7 +4090,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx000001100xxxxxxxxxxxxx
lsr. */
- return 1709;
+ return 1710;
}
else
{
@@ -4098,7 +4098,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx010001100xxxxxxxxxxxxx
lsr. */
- return 1707;
+ return 1708;
}
}
else
@@ -4107,7 +4107,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x1001100xxxxxxxxxxxxx
lsr. */
- return 1708;
+ return 1709;
}
}
else
@@ -4116,7 +4116,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0xx101100xxxxxxxxxxxxx
lsrr. */
- return 1710;
+ return 1711;
}
}
else
@@ -4131,7 +4131,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx000011100xxxxxxxxxxxxx
lsl. */
- return 1703;
+ return 1704;
}
else
{
@@ -4139,7 +4139,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx010011100xxxxxxxxxxxxx
lsl. */
- return 1701;
+ return 1702;
}
}
else
@@ -4148,7 +4148,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x1011100xxxxxxxxxxxxx
lsl. */
- return 1702;
+ return 1703;
}
}
else
@@ -4157,7 +4157,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0xx111100xxxxxxxxxxxxx
lslr. */
- return 1704;
+ return 1705;
}
}
}
@@ -4172,7 +4172,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx1000x0xxxxxxxxxx
asr. */
- return 1261;
+ return 1262;
}
else
{
@@ -4180,7 +4180,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx1001x0xxxxxxxxxx
asr. */
- return 1262;
+ return 1263;
}
}
else
@@ -4193,7 +4193,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx100001xxxxxxxxxx
lsr. */
- return 1705;
+ return 1706;
}
else
{
@@ -4201,7 +4201,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx100101xxxxxxxxxx
lsr. */
- return 1706;
+ return 1707;
}
}
else
@@ -4212,7 +4212,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx100011xxxxxxxxxx
lsl. */
- return 1699;
+ return 1700;
}
else
{
@@ -4220,7 +4220,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx100111xxxxxxxxxx
lsl. */
- return 1700;
+ return 1701;
}
}
}
@@ -4236,7 +4236,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x000xxxxxx100xxxxxxxxxxxxx
ld1sb. */
- return 1537;
+ return 1538;
}
else
{
@@ -4244,7 +4244,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x010xxxxxx100xxxxxxxxxxxxx
ld1sh. */
- return 1550;
+ return 1551;
}
}
else
@@ -4255,7 +4255,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x001xxxxxx100xxxxxxxxxxxxx
ld1rb. */
- return 1507;
+ return 1508;
}
else
{
@@ -4263,7 +4263,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x011xxxxxx100xxxxxxxxxxxxx
ld1rsw. */
- return 1528;
+ return 1529;
}
}
}
@@ -4278,7 +4278,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x00x0xxxxx100xxxxxxxxxxxxx
ld1sb. */
- return 1536;
+ return 1537;
}
else
{
@@ -4286,7 +4286,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x01x0xxxxx100xxxxxxxxxxxxx
ld1sh. */
- return 1548;
+ return 1549;
}
}
else
@@ -4299,7 +4299,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x0001xxxxx100xxxxxxxxxxxxx
ld1sb. */
- return 1541;
+ return 1542;
}
else
{
@@ -4307,7 +4307,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x0101xxxxx100xxxxxxxxxxxxx
ld1sh. */
- return 1553;
+ return 1554;
}
}
else
@@ -4318,7 +4318,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x0011xxxxx100xxxxxxxxxxxxx
prfb. */
- return 1739;
+ return 1740;
}
else
{
@@ -4326,7 +4326,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x0111xxxxx100xxxxxxxxxxxxx
ld1sh. */
- return 1549;
+ return 1550;
}
}
}
@@ -4347,7 +4347,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0xxxxx010xxxxxxxxxxxxx
mla. */
- return 1712;
+ return 1713;
}
else
{
@@ -4357,7 +4357,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x00x0xxxxx010xxxxxxxxxxxxx
ld1b. */
- return 1473;
+ return 1474;
}
else
{
@@ -4365,7 +4365,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x01x0xxxxx010xxxxxxxxxxxxx
ld1h. */
- return 1493;
+ return 1494;
}
}
}
@@ -4377,7 +4377,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x00x0xxxxx010xxxxxxxxxxxxx
ld1b. */
- return 1478;
+ return 1479;
}
else
{
@@ -4385,7 +4385,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x01x0xxxxx010xxxxxxxxxxxxx
ld1h. */
- return 1498;
+ return 1499;
}
}
}
@@ -4405,7 +4405,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx010000xxxxxxxxxx
index. */
- return 1464;
+ return 1465;
}
else
{
@@ -4413,7 +4413,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx010001xxxxxxxxxx
index. */
- return 1465;
+ return 1466;
}
}
else
@@ -4426,7 +4426,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0001xxxxx01010xxxxxxxxxxx
addvl. */
- return 1251;
+ return 1252;
}
else
{
@@ -4434,7 +4434,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0101xxxxx01010xxxxxxxxxxx
rdvl. */
- return 1773;
+ return 1774;
}
}
else
@@ -4443,7 +4443,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0x11xxxxx01010xxxxxxxxxxx
addpl. */
- return 1250;
+ return 1251;
}
}
}
@@ -4455,7 +4455,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx010x10xxxxxxxxxx
index. */
- return 1466;
+ return 1467;
}
else
{
@@ -4463,7 +4463,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx010x11xxxxxxxxxx
index. */
- return 1463;
+ return 1464;
}
}
}
@@ -4475,7 +4475,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x00x1xxxxx010xxxxxxxxxxxxx
prfw. */
- return 1757;
+ return 1758;
}
else
{
@@ -4483,7 +4483,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x01x1xxxxx010xxxxxxxxxxxxx
ld1h. */
- return 1494;
+ return 1495;
}
}
}
@@ -4495,7 +4495,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x00x1xxxxx010xxxxxxxxxxxxx
prfw. */
- return 1759;
+ return 1760;
}
else
{
@@ -4503,7 +4503,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x01x1xxxxx010xxxxxxxxxxxxx
ld1h. */
- return 1499;
+ return 1500;
}
}
}
@@ -4520,7 +4520,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0xxxxx110xxxxxxxxxxxxx
mad. */
- return 1711;
+ return 1712;
}
else
{
@@ -4536,7 +4536,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0x010xxxx110x00xxxxxxxxxx
sqincw. */
- return 1831;
+ return 1832;
}
else
{
@@ -4546,7 +4546,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00110xxxx110x00xxxxxxxxxx
sqinch. */
- return 1825;
+ return 1826;
}
else
{
@@ -4554,7 +4554,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01110xxxx110x00xxxxxxxxxx
sqincd. */
- return 1822;
+ return 1823;
}
}
}
@@ -4566,7 +4566,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0x011xxxx110x00xxxxxxxxxx
incw. */
- return 1461;
+ return 1462;
}
else
{
@@ -4576,7 +4576,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00111xxxx110x00xxxxxxxxxx
inch. */
- return 1457;
+ return 1458;
}
else
{
@@ -4584,7 +4584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01111xxxx110x00xxxxxxxxxx
incd. */
- return 1455;
+ return 1456;
}
}
}
@@ -4597,7 +4597,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0x01xxxxx110x10xxxxxxxxxx
sqdecw. */
- return 1817;
+ return 1818;
}
else
{
@@ -4607,7 +4607,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0011xxxxx110x10xxxxxxxxxx
sqdech. */
- return 1811;
+ return 1812;
}
else
{
@@ -4615,7 +4615,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0111xxxxx110x10xxxxxxxxxx
sqdecd. */
- return 1808;
+ return 1809;
}
}
}
@@ -4632,7 +4632,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0x010xxxx110x01xxxxxxxxxx
uqincw. */
- return 1979;
+ return 1980;
}
else
{
@@ -4642,7 +4642,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00110xxxx110x01xxxxxxxxxx
uqinch. */
- return 1973;
+ return 1974;
}
else
{
@@ -4650,7 +4650,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01110xxxx110x01xxxxxxxxxx
uqincd. */
- return 1970;
+ return 1971;
}
}
}
@@ -4662,7 +4662,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0x011xxxx110x01xxxxxxxxxx
decw. */
- return 1336;
+ return 1337;
}
else
{
@@ -4672,7 +4672,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00111xxxx110x01xxxxxxxxxx
dech. */
- return 1332;
+ return 1333;
}
else
{
@@ -4680,7 +4680,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01111xxxx110x01xxxxxxxxxx
decd. */
- return 1330;
+ return 1331;
}
}
}
@@ -4693,7 +4693,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0x01xxxxx110x11xxxxxxxxxx
uqdecw. */
- return 1965;
+ return 1966;
}
else
{
@@ -4703,7 +4703,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0011xxxxx110x11xxxxxxxxxx
uqdech. */
- return 1959;
+ return 1960;
}
else
{
@@ -4711,7 +4711,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0111xxxxx110x11xxxxxxxxxx
uqdecd. */
- return 1956;
+ return 1957;
}
}
}
@@ -4730,7 +4730,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x0000xxxxx110xxxxxxxxxxxxx
prfb. */
- return 1736;
+ return 1737;
}
else
{
@@ -4738,7 +4738,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x0100xxxxx110xxxxxxxxxxxxx
prfh. */
- return 1751;
+ return 1752;
}
}
else
@@ -4749,7 +4749,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x0001xxxxx110xxxxxxxxxxxxx
[...]
[diff truncated at 100000 bytes]
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