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[binutils-gdb/binutils-2_30-branch] [ARM] Fix bxns mask


https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=54ef1671ba67210fb24e41d898ceea6939e9b1f5

commit 54ef1671ba67210fb24e41d898ceea6939e9b1f5
Author: Thomas Preud'homme <thomas.preudhomme@arm.com>
Date:   Fri Mar 16 14:18:53 2018 +0000

    [ARM] Fix bxns mask
    
    Bit 7 of BXNS is a fixed bit which distinguish it from BLXNS. Yet it is
    not set in the disassembler entry mask. This commit fixes that.
    
    2018-03-16  Thomas Preud'homme  <thomas.preudhomme@arm.com>
    
    	Backport from mainline
    	2018-02-19  Thomas Preud'homme  <thomas.preudhomme@arm.com>
    
    opcodes/
    	* arm-dis.c (thumb_opcodes): Fix BXNS mask.

Diff:
---
 opcodes/ChangeLog | 7 +++++++
 opcodes/arm-dis.c | 2 +-
 2 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index dcca8ce..cae90eb 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,10 @@
+2018-03-16  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	Backport from mainline
+	2018-02-19  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* arm-dis.c (thumb_opcodes): Fix BXNS mask.
+
 2018-02-05  Nick Clifton  <nickc@redhat.com>
 
 	* po/pt_BR.po: Updated Brazilian Portuguese translation.
diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c
index 5efe031..afa9410 100644
--- a/opcodes/arm-dis.c
+++ b/opcodes/arm-dis.c
@@ -2530,7 +2530,7 @@ static const struct opcode16 thumb_opcodes[] =
 
   /* ARMv8-M Security Extensions instructions.  */
   {ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8M), 0x4784, 0xff87, "blxns\t%3-6r"},
-  {ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8M), 0x4704, 0xff07, "bxns\t%3-6r"},
+  {ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8M), 0x4704, 0xff87, "bxns\t%3-6r"},
 
   /* ARM V8 instructions.  */
   {ARM_FEATURE_CORE_LOW (ARM_EXT_V8),  0xbf50, 0xffff, "sevl%c"},


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