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[binutils-gdb] [ARC] Add SJLI instruction.


https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=7179e0e6b2e0ed7b220af8836a88ef308faf5898

commit 7179e0e6b2e0ed7b220af8836a88ef308faf5898
Author: Claudiu Zissulescu <claziss@synopsys.com>
Date:   Wed Jul 19 09:56:55 2017 +0200

    [ARC] Add SJLI instruction.
    
    include/
    2017-07-19  Claudiu Zissulescu  <claziss@synopsys.com>
    
    	* opcode/arc.h (SJLI): Add.
    
    opcode/
    2017-07-19  Claudiu Zissulescu  <claziss@synopsys.com>
    
    	* arc-opc.c (extract_uimm12_20): New function.
    	(UIMM12_20): New operand.
    	(SIMM3_5_S): Adjust.
    	* arc-tbl.h (sjli): Add new instruction.

Diff:
---
 include/ChangeLog    |  4 ++++
 include/opcode/arc.h |  1 +
 opcodes/ChangeLog    |  7 +++++++
 opcodes/arc-opc.c    | 18 +++++++++++++++++-
 opcodes/arc-tbl.h    |  3 +++
 5 files changed, 32 insertions(+), 1 deletion(-)

diff --git a/include/ChangeLog b/include/ChangeLog
index a31f62e..da1ce10 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,4 +1,8 @@
 2017-07-19  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* opcode/arc.h (SJLI): Add.
+
+2017-07-19  Claudiu Zissulescu  <claziss@synopsys.com>
 	    John Eric Martin  <John.Martin@emmicro-us.com>
 
 	* elf/arc-reloc.def: Add JLI relocs howto.
diff --git a/include/opcode/arc.h b/include/opcode/arc.h
index 69b2630..cd8b1a8 100644
--- a/include/opcode/arc.h
+++ b/include/opcode/arc.h
@@ -76,6 +76,7 @@ typedef enum
   PMU,
   POP,
   PUSH,
+  SJLI,
   STORE,
   SUB,
   ULTRAIP,
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index e789003..d14b325 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,4 +1,11 @@
 2017-07-19  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* arc-opc.c (extract_uimm12_20): New function.
+	(UIMM12_20): New operand.
+	(SIMM3_5_S): Adjust.
+	* arc-tbl.h (sjli): Add new instruction.
+
+2017-07-19  Claudiu Zissulescu  <claziss@synopsys.com>
 	    John Eric Martin  <John.Martin@emmicro-us.com>
 
 	* arc-opc.c (UIMM10_6_S_JLIOFF): Define.
diff --git a/opcodes/arc-opc.c b/opcodes/arc-opc.c
index 7f934ce..f39704d 100644
--- a/opcodes/arc-opc.c
+++ b/opcodes/arc-opc.c
@@ -1269,6 +1269,18 @@ extract_nps_misc_imm_offset (unsigned long long  insn,
   return ((insn >> 8) & 0x1f) * 4;
 }
 
+static long long int
+extract_uimm12_20 (unsigned long long insn ATTRIBUTE_UNUSED,
+		   bfd_boolean * invalid ATTRIBUTE_UNUSED)
+{
+  int value = 0;
+
+  value |= ((insn >> 6) & 0x003f) << 0;
+  value |= ((insn >> 0) & 0x003f) << 6;
+
+  return value;
+}
+
 /* Include the generic extract/insert functions.  Order is important
    as some of the functions present in the .h may be disabled via
    defines.  */
@@ -1934,8 +1946,12 @@ const struct arc_operand arc_operands[] =
   {12, 0, -SIMM12_20R, ARC_OPERAND_SIGNED | ARC_OPERAND_PCREL,
    insert_simm12_20, extract_simm12_20},
 
+  /* UIMM12_20 mask = 00000000000000000000111111222222.  */
+#define UIMM12_20	(SIMM12_20R + 1)
+  {12, 0, 0, ARC_OPERAND_UNSIGNED, insert_simm12_20, extract_uimm12_20},
+
   /* SIMM3_5_S mask = 0000011100000000.  */
-#define SIMM3_5_S	(SIMM12_20R + 1)
+#define SIMM3_5_S	(UIMM12_20 + 1)
   {3, 0, 0, ARC_OPERAND_SIGNED | ARC_OPERAND_NCHK,
    insert_simm3s, extract_simm3s},
 
diff --git a/opcodes/arc-tbl.h b/opcodes/arc-tbl.h
index 07ff304..ab51f0d 100644
--- a/opcodes/arc-tbl.h
+++ b/opcodes/arc-tbl.h
@@ -14535,6 +14535,9 @@
 /* sfxtr<.f><.cc> b,b,limm 00110bbb11101001FBBB1111100QQQQQ.  */
 { "sfxtr", 0x30E90F80, 0xF8FF0FE0, ARC_OPCODE_ARC700, ARITH, NONE, { RB, RBdup, LIMM }, { C_F, C_CC }},
 
+/* sjli u12 00101RRR101000001RRRuuuuuuUUUUUU.  */
+{ "sjli", 0x28A08000, 0xFFFFF000, ARC_OPCODE_ARCv2EM, SJLI, CD1, { UIMM12_20 }, { 0 }},
+
 /* sleep c 00100001001011110000CCCCCC111111.  */
 { "sleep", 0x212F003F, 0xFFFFF03F, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, KERNEL, NONE, { RC }, { 0 }},


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