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[binutils-gdb] MIPS/opcodes: Correctly combine ASE flags for ASE_MIPS16E2_MT calculation
- From: Maciej W.Rozycki <macro at sourceware dot org>
- To: bfd-cvs at sourceware dot org
- Date: 29 Jun 2017 23:56:11 -0000
- Subject: [binutils-gdb] MIPS/opcodes: Correctly combine ASE flags for ASE_MIPS16E2_MT calculation
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=60804c53a0c365f0802e90c12dfcbe6696b861fe
commit 60804c53a0c365f0802e90c12dfcbe6696b861fe
Author: Maciej W. Rozycki <macro@imgtec.com>
Date: Fri Jun 30 00:55:07 2017 +0100
MIPS/opcodes: Correctly combine ASE flags for ASE_MIPS16E2_MT calculation
Correct a commit 25499ac7ee92 ("MIPS16e2: Add MIPS16e2 ASE support")
disassembler bug with the handling of the ASE_MIPS16E2_MT combination
ASE flag, where the calculation uses MIPS ABI Flags directly rather than
calculated internal ASE flags. Consequently code does not correctly set
the ASE_MIPS16E2_MT flag when the MIPS16e2 ASE flag and the MT ASE flag
come from different sources, i.e. one from the BFD chosen and the other
one from MIPS ABI Flags.
Fix this by using internal ASE_MT and ASE_MIPS16E2 flags in a separate
subsequent step, factored out to a dedicated function for use with
future combination ASE flags. Adjust the `mips16e2@mips16e2-mt-sub.d'
test case accordingly, where the MT flag comes from the BFD selected for
the disassembler and the MIPS16e2 flag comes from the ELF binary itself.
opcodes/
* mips-dis.c (mips_calculate_combination_ases): New function.
(mips_convert_abiflags_ases): Factor out ASE_MIPS16E2_MT
calculation to the new function.
(set_default_mips_dis_options): Call the new function.
gas/
* testsuite/gas/mips/mips16e2@mips16e2-mt-sub.d: Adjust for the
ASE_MIPS16E2_MT flag disassembler fix.
* testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e2-mt-sub.d:
Likewise.
Diff:
---
gas/ChangeLog | 7 +++++
.../mips/mips16e2-interaptiv-mr2@mips16e2-mt-sub.d | 19 +-----------
gas/testsuite/gas/mips/mips16e2@mips16e2-mt-sub.d | 36 ++++++++--------------
opcodes/ChangeLog | 7 +++++
opcodes/mips-dis.c | 16 ++++++++--
5 files changed, 40 insertions(+), 45 deletions(-)
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 43a7528..d152909 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,12 @@
2017-06-29 Maciej W. Rozycki <macro@imgtec.com>
+ * testsuite/gas/mips/mips16e2@mips16e2-mt-sub.d: Adjust for the
+ ASE_MIPS16E2_MT flag disassembler fix.
+ * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e2-mt-sub.d:
+ Likewise.
+
+2017-06-29 Maciej W. Rozycki <macro@imgtec.com>
+
* config/tc-mips.c (mips_set_ase): Clear the ASE_MIPS16E2_MT
flag before recalculating.
* testsuite/gas/mips/mips16e2-mt-err.d: New test.
diff --git a/gas/testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e2-mt-sub.d b/gas/testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e2-mt-sub.d
index 85abe62..b3a4146 100644
--- a/gas/testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e2-mt-sub.d
+++ b/gas/testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e2-mt-sub.d
@@ -2,21 +2,4 @@
#name: MIPS16e2 MT ASE subset disassembly
#as: -32 -I$srcdir/$subdir
#source: mips16e2-mt-sub.s
-
-.*: +file format .*mips.*
-
-Disassembly of section \.text:
-[0-9a-f]+ <[^>]*> f0c0 3010 ehb
-[0-9a-f]+ <[^>]*> f026 6701 dmt
-[0-9a-f]+ <[^>]*> f026 6701 dmt
-[0-9a-f]+ <[^>]*> f022 6741 dmt v0
-[0-9a-f]+ <[^>]*> f027 6701 emt
-[0-9a-f]+ <[^>]*> f027 6701 emt
-[0-9a-f]+ <[^>]*> f023 6741 emt v0
-[0-9a-f]+ <[^>]*> f026 6700 dvpe
-[0-9a-f]+ <[^>]*> f026 6700 dvpe
-[0-9a-f]+ <[^>]*> f022 6740 dvpe v0
-[0-9a-f]+ <[^>]*> f027 6700 evpe
-[0-9a-f]+ <[^>]*> f027 6700 evpe
-[0-9a-f]+ <[^>]*> f023 6740 evpe v0
- \.\.\.
+#dump: mips16e2@mips16e2-mt-sub.d
diff --git a/gas/testsuite/gas/mips/mips16e2@mips16e2-mt-sub.d b/gas/testsuite/gas/mips/mips16e2@mips16e2-mt-sub.d
index a7498f6..85abe62 100644
--- a/gas/testsuite/gas/mips/mips16e2@mips16e2-mt-sub.d
+++ b/gas/testsuite/gas/mips/mips16e2@mips16e2-mt-sub.d
@@ -7,28 +7,16 @@
Disassembly of section \.text:
[0-9a-f]+ <[^>]*> f0c0 3010 ehb
-[0-9a-f]+ <[^>]*> f026 extend 0x26
-[0-9a-f]+ <[^>]*> 6701 move s0,at
-[0-9a-f]+ <[^>]*> f026 extend 0x26
-[0-9a-f]+ <[^>]*> 6701 move s0,at
-[0-9a-f]+ <[^>]*> f022 extend 0x22
-[0-9a-f]+ <[^>]*> 6741 move v0,at
-[0-9a-f]+ <[^>]*> f027 extend 0x27
-[0-9a-f]+ <[^>]*> 6701 move s0,at
-[0-9a-f]+ <[^>]*> f027 extend 0x27
-[0-9a-f]+ <[^>]*> 6701 move s0,at
-[0-9a-f]+ <[^>]*> f023 extend 0x23
-[0-9a-f]+ <[^>]*> 6741 move v0,at
-[0-9a-f]+ <[^>]*> f026 extend 0x26
-[0-9a-f]+ <[^>]*> 6700 move s0,zero
-[0-9a-f]+ <[^>]*> f026 extend 0x26
-[0-9a-f]+ <[^>]*> 6700 move s0,zero
-[0-9a-f]+ <[^>]*> f022 extend 0x22
-[0-9a-f]+ <[^>]*> 6740 move v0,zero
-[0-9a-f]+ <[^>]*> f027 extend 0x27
-[0-9a-f]+ <[^>]*> 6700 move s0,zero
-[0-9a-f]+ <[^>]*> f027 extend 0x27
-[0-9a-f]+ <[^>]*> 6700 move s0,zero
-[0-9a-f]+ <[^>]*> f023 extend 0x23
-[0-9a-f]+ <[^>]*> 6740 move v0,zero
+[0-9a-f]+ <[^>]*> f026 6701 dmt
+[0-9a-f]+ <[^>]*> f026 6701 dmt
+[0-9a-f]+ <[^>]*> f022 6741 dmt v0
+[0-9a-f]+ <[^>]*> f027 6701 emt
+[0-9a-f]+ <[^>]*> f027 6701 emt
+[0-9a-f]+ <[^>]*> f023 6741 emt v0
+[0-9a-f]+ <[^>]*> f026 6700 dvpe
+[0-9a-f]+ <[^>]*> f026 6700 dvpe
+[0-9a-f]+ <[^>]*> f022 6740 dvpe v0
+[0-9a-f]+ <[^>]*> f027 6700 evpe
+[0-9a-f]+ <[^>]*> f027 6700 evpe
+[0-9a-f]+ <[^>]*> f023 6740 evpe v0
\.\.\.
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 325cd84..e4b2470 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,10 @@
+2017-06-29 Maciej W. Rozycki <macro@imgtec.com>
+
+ * mips-dis.c (mips_calculate_combination_ases): New function.
+ (mips_convert_abiflags_ases): Factor out ASE_MIPS16E2_MT
+ calculation to the new function.
+ (set_default_mips_dis_options): Call the new function.
+
2017-06-29 Anton Kolesov <Anton.Kolesov@synopsys.com>
* arc-dis.c (parse_disassembler_options): Use
diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c
index e19d59a..588247a 100644
--- a/opcodes/mips-dis.c
+++ b/opcodes/mips-dis.c
@@ -805,12 +805,21 @@ mips_convert_abiflags_ases (unsigned long afl_ases)
opcode_ases |= ASE_DSPR3;
if (afl_ases & AFL_ASE_MIPS16E2)
opcode_ases |= ASE_MIPS16E2;
- if ((afl_ases & (AFL_ASE_MIPS16E2 | AFL_ASE_MT))
- == (AFL_ASE_MIPS16E2 | AFL_ASE_MT))
- opcode_ases |= ASE_MIPS16E2_MT;
return opcode_ases;
}
+/* Calculate combination ASE flags from regular ASE flags. */
+
+static unsigned long
+mips_calculate_combination_ases (unsigned long opcode_ases)
+{
+ unsigned long combination_ases = 0;
+
+ if ((opcode_ases & (ASE_MIPS16E2 | ASE_MT)) == (ASE_MIPS16E2 | ASE_MT))
+ combination_ases |= ASE_MIPS16E2_MT;
+ return combination_ases;
+}
+
static void
set_default_mips_dis_options (struct disassemble_info *info)
{
@@ -880,6 +889,7 @@ set_default_mips_dis_options (struct disassemble_info *info)
mips_ase |= ASE_MDMX;
}
#endif
+ mips_ase |= mips_calculate_combination_ases (mips_ase);
}
static void