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[binutils-gdb] Add support for the Cortex-A55 and Cortex-A75 versions of the AArch64 architecture.


https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=1e29262747bed568c673b8765d214a4a16772da1

commit 1e29262747bed568c673b8765d214a4a16772da1
Author: James Greenhalgh <james.greenhalgh@arm.com>
Date:   Wed Jun 21 09:13:25 2017 +0100

    Add support for the Cortex-A55 and Cortex-A75 versions of the AArch64 architecture.
    
    	* config/tc-aarch64.c (aarch64_cpus): Add cortex-a55 and cortex-a75.
    	* doc/c-aarch64.texi (-mcpu): Document cortex-a55 and cortex-a75.

Diff:
---
 gas/ChangeLog           | 5 +++++
 gas/config/tc-aarch64.c | 6 ++++++
 gas/doc/c-aarch64.texi  | 2 ++
 3 files changed, 13 insertions(+)

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 38ffc66..2e7e185 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2017-06-21  James Greenhalgh  <james.greenhalgh@arm.com>
+
+	* config/tc-aarch64.c (aarch64_cpus): Add cortex-a55 and cortex-a75.
+	* doc/c-aarch64.texi (-mcpu): Document cortex-a55 and cortex-a75.
+
 2017-06-15  H.J. Lu  <hongjiu.lu@intel.com>
 
 	PR binutils/21594
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index be01bdd..fae29b4 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -8395,6 +8395,12 @@ static const struct aarch64_cpu_option_table aarch64_cpus[] = {
 				  AARCH64_FEATURE_CRC), "Cortex-A72"},
   {"cortex-a73", AARCH64_FEATURE (AARCH64_ARCH_V8,
 				  AARCH64_FEATURE_CRC), "Cortex-A73"},
+  {"cortex-a55", AARCH64_FEATURE (AARCH64_ARCH_V8_2,
+				  AARCH64_FEATURE_RCPC | AARCH64_FEATURE_F16),
+				  "Cortex-A55"},
+  {"cortex-a75", AARCH64_FEATURE (AARCH64_ARCH_V8_2,
+				  AARCH64_FEATURE_RCPC | AARCH64_FEATURE_F16),
+				  "Cortex-A75"},
   {"exynos-m1", AARCH64_FEATURE (AARCH64_ARCH_V8,
 				 AARCH64_FEATURE_CRC | AARCH64_FEATURE_CRYPTO),
 				"Samsung Exynos M1"},
diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi
index 2a01c3f..2477555 100644
--- a/gas/doc/c-aarch64.texi
+++ b/gas/doc/c-aarch64.texi
@@ -57,9 +57,11 @@ message if an attempt is made to assemble an instruction which will not execute
 on the target processor.  The following processor names are recognized:
 @code{cortex-a35},
 @code{cortex-a53},
+@code{cortex-a55},
 @code{cortex-a57},
 @code{cortex-a72},
 @code{cortex-a73},
+@code{cortex-a75},
 @code{exynos-m1},
 @code{falkor},
 @code{qdf24xx},


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