This is the mail archive of the
binutils-cvs@sourceware.org
mailing list for the binutils project.
[binutils-gdb/binutils-2_28-branch] sve
- From: Richard Sandiford <rsandifo at sourceware dot org>
- To: bfd-cvs at sourceware dot org
- Date: 27 Feb 2017 11:37:42 -0000
- Subject: [binutils-gdb/binutils-2_28-branch] sve
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=1e0971e5049e1fcd4efe3f771bc4098ac8c30aeb
commit 1e0971e5049e1fcd4efe3f771bc4098ac8c30aeb
Author: Richard Sandiford <richard.sandiford@arm.com>
Date: Mon Feb 27 11:35:03 2017 +0000
sve
[AArch64] Additional SVE instructions
This patch supports some additions to the SVE architecture prior to
its public release.
include/
* opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4x16)
(AARCH64_OPND_SVE_IMM_ROT1, AARCH64_OPND_SVE_IMM_ROT2)
(AARCH64_OPND_SVE_Zm3_INDEX, AARCH64_OPND_SVE_Zm3_22_INDEX)
(AARCH64_OPND_SVE_Zm4_INDEX): New aarch64_opnds.
opcodes/
* aarch64-tbl.h (OP_SVE_HMH, OP_SVE_VMU_HSD, OP_SVE_VMVU_HSD)
(OP_SVE_VMVV_HSD, OP_SVE_VMVVU_HSD, OP_SVE_VM_HSD, OP_SVE_VUVV_HSD)
(OP_SVE_VUV_HSD, OP_SVE_VU_HSD, OP_SVE_VVVU_H, OP_SVE_VVVU_S)
(OP_SVE_VVVU_HSD, OP_SVE_VVV_D, OP_SVE_VVV_D_H, OP_SVE_VVV_H)
(OP_SVE_VVV_HSD, OP_SVE_VVV_S, OP_SVE_VVV_S_B, OP_SVE_VVV_SD_BH)
(OP_SVE_VV_BHSDQ, OP_SVE_VV_HSD, OP_SVE_VZVV_HSD, OP_SVE_VZV_HSD)
(OP_SVE_V_HSD): New macros.
(OP_SVE_VMU_SD, OP_SVE_VMVU_SD, OP_SVE_VM_SD, OP_SVE_VUVV_SD)
(OP_SVE_VU_SD, OP_SVE_VVVU_SD, OP_SVE_VVV_SD, OP_SVE_VZVV_SD)
(OP_SVE_VZV_SD, OP_SVE_V_SD): Delete.
(aarch64_opcode_table): Add new SVE instructions.
(aarch64_opcode_table): Use imm_rotate{1,2} instead of imm_rotate
for rotation operands. Add new SVE operands.
* aarch64-asm.h (ins_sve_addr_ri_s4): New inserter.
(ins_sve_quad_index): Likewise.
(ins_imm_rotate): Split into...
(ins_imm_rotate1, ins_imm_rotate2): ...these two inserters.
* aarch64-asm.c (aarch64_ins_imm_rotate): Split into...
(aarch64_ins_imm_rotate1, aarch64_ins_imm_rotate2): ...these two
functions.
(aarch64_ins_sve_addr_ri_s4): New function.
(aarch64_ins_sve_quad_index): Likewise.
(do_misc_encoding): Handle "MOV Zn.Q, Qm".
* aarch64-asm-2.c: Regenerate.
* aarch64-dis.h (ext_sve_addr_ri_s4): New extractor.
(ext_sve_quad_index): Likewise.
(ext_imm_rotate): Split into...
(ext_imm_rotate1, ext_imm_rotate2): ...these two extractors.
* aarch64-dis.c (aarch64_ext_imm_rotate): Split into...
(aarch64_ext_imm_rotate1, aarch64_ext_imm_rotate2): ...these two
functions.
(aarch64_ext_sve_addr_ri_s4): New function.
(aarch64_ext_sve_quad_index): Likewise.
(aarch64_ext_sve_index): Allow quad indices.
(do_misc_decoding): Likewise.
* aarch64-dis-2.c: Regenerate.
* aarch64-opc.h (FLD_SVE_i3h, FLD_SVE_rot1, FLD_SVE_rot2): New
aarch64_field_kinds.
(OPD_F_OD_MASK): Widen by one bit.
(OPD_F_NO_ZR): Bump accordingly.
(get_operand_field_width): New function.
* aarch64-opc.c (fields): Add new SVE fields.
(operand_general_constraint_met_p): Handle new SVE operands.
(aarch64_print_operand): Likewise.
* aarch64-opc-2.c: Regenerate.
gas/
* doc/c-aarch64.texi: Document that sve implies fp16, simd and compnum.
* config/tc-aarch64.c (parse_vector_type_for_operand): Allow .q
to be used with SVE registers.
(parse_operands): Handle new SVE operands.
(aarch64_features): Make "sve" require F16 rather than FP. Also
require COMPNUM.
* testsuite/gas/aarch64/sve.s: Add tests for new instructions.
Include compnum tests.
* testsuite/gas/aarch64/sve.d: Update accordingly.
* testsuite/gas/aarch64/sve-invalid.s: Add tests for new instructions.
* testsuite/gas/aarch64/sve-invalid.l: Update accordingly. Also
update expected output for new FMOV and MOV alternatives.
Diff:
---
gas/ChangeLog | 15 +
gas/config/tc-aarch64.c | 13 +-
gas/doc/c-aarch64.texi | 5 +-
gas/testsuite/gas/aarch64/sve-invalid.l | 270 +-
gas/testsuite/gas/aarch64/sve-invalid.s | 163 +
gas/testsuite/gas/aarch64/sve.d | 2328 ++++++++++++-
gas/testsuite/gas/aarch64/sve.s | 2295 +++++++++++++
include/ChangeLog | 7 +
include/opcode/aarch64.h | 6 +
opcodes/ChangeLog | 48 +
opcodes/aarch64-asm-2.c | 153 +-
opcodes/aarch64-asm.c | 78 +-
opcodes/aarch64-asm.h | 5 +-
opcodes/aarch64-dis-2.c | 5388 +++++++++++++++++--------------
opcodes/aarch64-dis.c | 79 +-
opcodes/aarch64-dis.h | 5 +-
opcodes/aarch64-opc-2.c | 6 +
opcodes/aarch64-opc.c | 39 +
opcodes/aarch64-opc.h | 15 +-
opcodes/aarch64-tbl.h | 326 +-
20 files changed, 8528 insertions(+), 2716 deletions(-)
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 01ccefb..7e170ad 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,20 @@
2017-02-27 Richard Sandiford <richard.sandiford@arm.com>
+ * doc/c-aarch64.texi: Document that sve implies fp16, simd and compnum.
+ * config/tc-aarch64.c (parse_vector_type_for_operand): Allow .q
+ to be used with SVE registers.
+ (parse_operands): Handle new SVE operands.
+ (aarch64_features): Make "sve" require F16 rather than FP. Also
+ require COMPNUM.
+ * testsuite/gas/aarch64/sve.s: Add tests for new instructions.
+ Include compnum tests.
+ * testsuite/gas/aarch64/sve.d: Update accordingly.
+ * testsuite/gas/aarch64/sve-invalid.s: Add tests for new instructions.
+ * testsuite/gas/aarch64/sve-invalid.l: Update accordingly. Also
+ update expected output for new FMOV and MOV alternatives.
+
+2017-02-27 Richard Sandiford <richard.sandiford@arm.com>
+
* doc/c-aarch64.texi: Add a "compnum" entry.
* config/tc-aarch64.c (aarch64_features): Likewise,
* testsuite/gas/aarch64/advsimd-compnum.s: New test.
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 8a9b277..f7b611c 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -837,7 +837,7 @@ elt_size:
element_size = 64;
break;
case 'q':
- if (width == 1)
+ if (reg_type == REG_TYPE_ZN || width == 1)
{
type = NT_q;
element_size = 128;
@@ -5431,6 +5431,9 @@ parse_operands (char *str, const aarch64_opcode *opcode)
info->qualifier = AARCH64_OPND_QLF_S_D;
break;
+ case AARCH64_OPND_SVE_Zm3_INDEX:
+ case AARCH64_OPND_SVE_Zm3_22_INDEX:
+ case AARCH64_OPND_SVE_Zm4_INDEX:
case AARCH64_OPND_SVE_Zn_INDEX:
reg_type = REG_TYPE_ZN;
goto vector_reg_index;
@@ -5567,6 +5570,8 @@ parse_operands (char *str, const aarch64_opcode *opcode)
case AARCH64_OPND_IMM_ROT1:
case AARCH64_OPND_IMM_ROT2:
case AARCH64_OPND_IMM_ROT3:
+ case AARCH64_OPND_SVE_IMM_ROT1:
+ case AARCH64_OPND_SVE_IMM_ROT2:
po_imm_nc_or_fail ();
info->imm.value = val;
break;
@@ -6090,6 +6095,7 @@ parse_operands (char *str, const aarch64_opcode *opcode)
/* No qualifier. */
break;
+ case AARCH64_OPND_SVE_ADDR_RI_S4x16:
case AARCH64_OPND_SVE_ADDR_RI_S4xVL:
case AARCH64_OPND_SVE_ADDR_RI_S4x2xVL:
case AARCH64_OPND_SVE_ADDR_RI_S4x3xVL:
@@ -8436,8 +8442,9 @@ static const struct aarch64_option_cpu_value_table aarch64_features[] = {
{"profile", AARCH64_FEATURE (AARCH64_FEATURE_PROFILE, 0),
AARCH64_ARCH_NONE},
{"sve", AARCH64_FEATURE (AARCH64_FEATURE_SVE, 0),
- AARCH64_FEATURE (AARCH64_FEATURE_FP
- | AARCH64_FEATURE_SIMD, 0)},
+ AARCH64_FEATURE (AARCH64_FEATURE_F16
+ | AARCH64_FEATURE_SIMD
+ | AARCH64_FEATURE_COMPNUM, 0)},
{"compnum", AARCH64_FEATURE (AARCH64_FEATURE_COMPNUM, 0),
AARCH64_FEATURE (AARCH64_FEATURE_F16
| AARCH64_FEATURE_SIMD, 0)},
diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi
index 71d8072..f5be0d4 100644
--- a/gas/doc/c-aarch64.texi
+++ b/gas/doc/c-aarch64.texi
@@ -158,8 +158,9 @@ automatically cause those extensions to be disabled.
@tab Enable ARMv8.1 Advanced SIMD extensions. This implies @code{simd}.
@item @code{simd} @tab ARMv8-A @tab ARMv8-A or later
@tab Enable Advanced SIMD extensions. This implies @code{fp}.
-@item @code{sve} @tab ARMv8-A @tab No
- @tab Enable the Scalable Vector Extensions. This implies @code{simd}.
+@item @code{sve} @tab ARMv8.2-A @tab No
+ @tab Enable the Scalable Vector Extensions. This implies @code{fp16},
+ @code{simd} and @code{compnum}.
@end multitable
@node AArch64 Syntax
diff --git a/gas/testsuite/gas/aarch64/sve-invalid.l b/gas/testsuite/gas/aarch64/sve-invalid.l
index 58739b3..6e614c3 100644
--- a/gas/testsuite/gas/aarch64/sve-invalid.l
+++ b/gas/testsuite/gas/aarch64/sve-invalid.l
@@ -2,13 +2,15 @@
.*: Error: operand 2 must be an SVE predicate register -- `fmov z1,z2'
.*: Error: operand mismatch -- `fmov z1,#1\.0'
.*: Info: did you mean this\?
-.*: Info: fmov z1\.s, #1\.000000000000000000e\+00
+.*: Info: fmov z1\.h, #1\.000000000000000000e\+00
.*: Info: other valid variant\(s\):
+.*: Info: fmov z1\.s, #1\.000000000000000000e\+00
.*: Info: fmov z1\.d, #1\.000000000000000000e\+00
.*: Error: operand mismatch -- `fmov z1,#0\.0'
.*: Info: did you mean this\?
-.*: Info: fmov z1\.s, #0\.0
+.*: Info: fmov z1\.h, #0\.0
.*: Info: other valid variant\(s\):
+.*: Info: fmov z1\.s, #0\.0
.*: Info: fmov z1\.d, #0\.0
.*: Error: missing predication type at operand 2 -- `not z0\.s,p1/'
.*: Error: missing predication type at operand 2 -- `not z0\.s,p1/,z2\.s'
@@ -144,6 +146,7 @@
.*: Info: mov z0\.h, h0
.*: Info: mov z0\.s, s0
.*: Info: mov z0\.d, d0
+.*: Info: mov z0\.q, q0
.*: Error: operand mismatch -- `mov z0,z1'
.*: Info: did you mean this\?
.*: Info: mov z0\.d, z1\.d
@@ -942,3 +945,266 @@
.*: Error: register element index out of range 0 to 7 at operand 2 -- `dup z0\.d,z1\.d\[-1\]'
.*: Error: register element index out of range 0 to 7 at operand 2 -- `dup z0\.d,z1\.d\[8\]'
.*: Error: constant expression required at operand 2 -- `dup z0\.d,z1\.d\[x0\]'
+.*: Error: operand mismatch -- `fabd z0\.b,p0/m,z0\.b,z0\.b'
+.*: Info: did you mean this\?
+.*: Info: fabd z0\.h, p0/m, z0\.h, z0\.h
+.*: Info: other valid variant\(s\):
+.*: Info: fabd z0\.s, p0/m, z0\.s, z0\.s
+.*: Info: fabd z0\.d, p0/m, z0\.d, z0\.d
+.*: Error: operand mismatch -- `fabd z0\.q,p0/m,z0\.q,z0\.q'
+.*: Info: did you mean this\?
+.*: Info: fabd z0\.h, p0/m, z0\.h, z0\.h
+.*: Info: other valid variant\(s\):
+.*: Info: fabd z0\.s, p0/m, z0\.s, z0\.s
+.*: Info: fabd z0\.d, p0/m, z0\.d, z0\.d
+.*: Error: operand mismatch -- `fcadd z0\.b,p0/m,z0\.b,z0\.b,#90'
+.*: Info: did you mean this\?
+.*: Info: fcadd z0\.h, p0/m, z0\.h, z0\.h, #90
+.*: Info: other valid variant\(s\):
+.*: Info: fcadd z0\.s, p0/m, z0\.s, z0\.s, #90
+.*: Info: fcadd z0\.d, p0/m, z0\.d, z0\.d, #90
+.*: Error: rotate expected to be 90 or 270 at operand 5 -- `fcadd z0\.h,p0/m,z0\.h,z0\.h,#-180'
+.*: Error: rotate expected to be 90 or 270 at operand 5 -- `fcadd z0\.h,p0/m,z0\.h,z0\.h,#-90'
+.*: Error: rotate expected to be 90 or 270 at operand 5 -- `fcadd z0\.h,p0/m,z0\.h,z0\.h,#0'
+.*: Error: rotate expected to be 90 or 270 at operand 5 -- `fcadd z0\.h,p0/m,z0\.h,z0\.h,#89'
+.*: Error: unexpected characters following instruction at operand 5 -- `fcadd z0\.h,p0/m,z0\.h,z0\.h,#90\.0'
+.*: Error: rotate expected to be 90 or 270 at operand 5 -- `fcadd z0\.h,p0/m,z0\.h,z0\.h,#180'
+.*: Error: rotate expected to be 90 or 270 at operand 5 -- `fcadd z0\.h,p0/m,z0\.h,z0\.h,#360'
+.*: Error: rotate expected to be 90 or 270 at operand 5 -- `fcadd z0\.h,p0/m,z0\.h,z0\.h,#450'
+.*: Error: operand mismatch -- `fcadd z0\.h,p0/z,z0\.h,z0\.h,#90'
+.*: Info: did you mean this\?
+.*: Info: fcadd z0\.h, p0/m, z0\.h, z0\.h, #90
+.*: Info: other valid variant\(s\):
+.*: Info: fcadd z0\.s, p0/m, z0\.s, z0\.s, #90
+.*: Info: fcadd z0\.d, p0/m, z0\.d, z0\.d, #90
+.*: Error: operand 3 must be the same register as operand 1 -- `fcadd z0\.h,p0/m,z1\.h,z0\.h,#90'
+.*: Error: operand mismatch -- `fcadd z0\.q,p0/m,z0\.q,z0\.q,#90'
+.*: Info: did you mean this\?
+.*: Info: fcadd z0\.h, p0/m, z0\.h, z0\.h, #90
+.*: Info: other valid variant\(s\):
+.*: Info: fcadd z0\.s, p0/m, z0\.s, z0\.s, #90
+.*: Info: fcadd z0\.d, p0/m, z0\.d, z0\.d, #90
+.*: Error: operand mismatch -- `fcmla z0\.b,p0/m,z0\.b,z0\.b,#90'
+.*: Info: did you mean this\?
+.*: Info: fcmla z0\.h, p0/m, z0\.h, z0\.h, #90
+.*: Info: other valid variant\(s\):
+.*: Info: fcmla z0\.s, p0/m, z0\.s, z0\.s, #90
+.*: Info: fcmla z0\.d, p0/m, z0\.d, z0\.d, #90
+.*: Error: rotate expected to be 0, 90, 180 or 270 at operand 5 -- `fcmla z0\.h,p0/m,z0\.h,z0\.h,#-180'
+.*: Error: rotate expected to be 0, 90, 180 or 270 at operand 5 -- `fcmla z0\.h,p0/m,z0\.h,z0\.h,#-90'
+.*: Error: rotate expected to be 0, 90, 180 or 270 at operand 5 -- `fcmla z0\.h,p0/m,z0\.h,z0\.h,#89'
+.*: Error: unexpected characters following instruction at operand 5 -- `fcmla z0\.h,p0/m,z0\.h,z0\.h,#90\.0'
+.*: Error: rotate expected to be 0, 90, 180 or 270 at operand 5 -- `fcmla z0\.h,p0/m,z0\.h,z0\.h,#360'
+.*: Error: rotate expected to be 0, 90, 180 or 270 at operand 5 -- `fcmla z0\.h,p0/m,z0\.h,z0\.h,#450'
+.*: Error: operand mismatch -- `fcmla z0\.h,p0/z,z0\.h,z0\.h,#90'
+.*: Info: did you mean this\?
+.*: Info: fcmla z0\.h, p0/m, z0\.h, z0\.h, #90
+.*: Info: other valid variant\(s\):
+.*: Info: fcmla z0\.s, p0/m, z0\.s, z0\.s, #90
+.*: Info: fcmla z0\.d, p0/m, z0\.d, z0\.d, #90
+.*: Error: operand mismatch -- `fcmla z0\.q,p0/m,z0\.q,z0\.q,#90'
+.*: Info: did you mean this\?
+.*: Info: fcmla z0\.h, p0/m, z0\.h, z0\.h, #90
+.*: Info: other valid variant\(s\):
+.*: Info: fcmla z0\.s, p0/m, z0\.s, z0\.s, #90
+.*: Info: fcmla z0\.d, p0/m, z0\.d, z0\.d, #90
+.*: Error: operand mismatch -- `fcmla z0\.b,z1\.b,z2\.b\[0\],#0'
+.*: Info: did you mean this\?
+.*: Info: fcmla z0\.h, z1\.h, z2\.h\[0\], #0
+.*: Error: register element index out of range 0 to 3 at operand 3 -- `fcmla z0\.h,z1\.h,z2\.h\[-1\],#0'
+.*: Error: register element index out of range 0 to 3 at operand 3 -- `fcmla z0\.h,z1\.h,z2\.h\[4\],#0'
+.*: Error: z0-z7 expected at operand 3 -- `fcmla z0\.h,z1\.h,z8\.h\[0\],#0'
+.*: Error: rotate expected to be 0, 90, 180 or 270 at operand 4 -- `fcmla z0\.h,z1\.h,z2\.h\[0\],#-180'
+.*: Error: rotate expected to be 0, 90, 180 or 270 at operand 4 -- `fcmla z0\.h,z1\.h,z2\.h\[0\],#-90'
+.*: Error: rotate expected to be 0, 90, 180 or 270 at operand 4 -- `fcmla z0\.h,z1\.h,z2\.h\[0\],#89'
+.*: Error: unexpected characters following instruction at operand 4 -- `fcmla z0\.h,z1\.h,z2\.h\[0\],#90\.0'
+.*: Error: rotate expected to be 0, 90, 180 or 270 at operand 4 -- `fcmla z0\.h,z1\.h,z2\.h\[0\],#360'
+.*: Error: rotate expected to be 0, 90, 180 or 270 at operand 4 -- `fcmla z0\.h,z1\.h,z2\.h\[0\],#450'
+.*: Error: register element index out of range 0 to 1 at operand 3 -- `fcmla z0\.s,z1\.s,z2\.s\[-1\],#0'
+.*: Error: register element index out of range 0 to 1 at operand 3 -- `fcmla z0\.s,z1\.s,z2\.s\[2\],#0'
+.*: Error: z0-z15 expected at operand 3 -- `fcmla z0\.s,z1\.s,z16\.s\[0\],#0'
+.*: Error: rotate expected to be 0, 90, 180 or 270 at operand 4 -- `fcmla z0\.s,z1\.s,z2\.s\[0\],#-180'
+.*: Error: rotate expected to be 0, 90, 180 or 270 at operand 4 -- `fcmla z0\.s,z1\.s,z2\.s\[0\],#-90'
+.*: Error: rotate expected to be 0, 90, 180 or 270 at operand 4 -- `fcmla z0\.s,z1\.s,z2\.s\[0\],#89'
+.*: Error: unexpected characters following instruction at operand 4 -- `fcmla z0\.s,z1\.s,z2\.s\[0\],#90\.0'
+.*: Error: rotate expected to be 0, 90, 180 or 270 at operand 4 -- `fcmla z0\.s,z1\.s,z2\.s\[0\],#360'
+.*: Error: rotate expected to be 0, 90, 180 or 270 at operand 4 -- `fcmla z0\.s,z1\.s,z2\.s\[0\],#450'
+.*: Error: operand mismatch -- `fcmla z0\.q,z1\.q,z2\.q\[0\],#0'
+.*: Info: did you mean this\?
+.*: Info: fcmla z0\.h, z1\.h, z2\.h\[0\], #0
+.*: Error: operand mismatch -- `fmla z0\.b,z1\.b,z2\.b\[0\]'
+.*: Info: did you mean this\?
+.*: Info: fmla z0\.h, z1\.h, z2\.h\[0\]
+.*: Error: register element index out of range 0 to 7 at operand 3 -- `fmla z0\.h,z1\.h,z2\.h\[-1\]'
+.*: Error: register element index out of range 0 to 7 at operand 3 -- `fmla z0\.h,z1\.h,z2\.h\[8\]'
+.*: Error: z0-z7 expected at operand 3 -- `fmla z0\.h,z1\.h,z8\.h\[0\]'
+.*: Error: register element index out of range 0 to 3 at operand 3 -- `fmla z0\.s,z1\.s,z2\.s\[-1\]'
+.*: Error: register element index out of range 0 to 3 at operand 3 -- `fmla z0\.s,z1\.s,z2\.s\[4\]'
+.*: Error: z0-z7 expected at operand 3 -- `fmla z0\.s,z1\.s,z8\.s\[0\]'
+.*: Error: register element index out of range 0 to 1 at operand 3 -- `fmla z0\.d,z1\.d,z2\.d\[-1\]'
+.*: Error: register element index out of range 0 to 1 at operand 3 -- `fmla z0\.d,z1\.d,z2\.d\[2\]'
+.*: Error: z0-z15 expected at operand 3 -- `fmla z0\.d,z1\.d,z16\.d\[0\]'
+.*: Error: operand mismatch -- `fmla z0\.q,z1\.q,z2\.q\[0\]'
+.*: Info: did you mean this\?
+.*: Info: fmla z0\.h, z1\.h, z2\.h\[0\]
+.*: Error: operand mismatch -- `fmls z0\.b,z1\.b,z2\.b\[0\]'
+.*: Info: did you mean this\?
+.*: Info: fmls z0\.h, z1\.h, z2\.h\[0\]
+.*: Error: register element index out of range 0 to 7 at operand 3 -- `fmls z0\.h,z1\.h,z2\.h\[-1\]'
+.*: Error: register element index out of range 0 to 7 at operand 3 -- `fmls z0\.h,z1\.h,z2\.h\[8\]'
+.*: Error: z0-z7 expected at operand 3 -- `fmls z0\.h,z1\.h,z8\.h\[0\]'
+.*: Error: register element index out of range 0 to 3 at operand 3 -- `fmls z0\.s,z1\.s,z2\.s\[-1\]'
+.*: Error: register element index out of range 0 to 3 at operand 3 -- `fmls z0\.s,z1\.s,z2\.s\[4\]'
+.*: Error: z0-z7 expected at operand 3 -- `fmls z0\.s,z1\.s,z8\.s\[0\]'
+.*: Error: register element index out of range 0 to 1 at operand 3 -- `fmls z0\.d,z1\.d,z2\.d\[-1\]'
+.*: Error: register element index out of range 0 to 1 at operand 3 -- `fmls z0\.d,z1\.d,z2\.d\[2\]'
+.*: Error: z0-z15 expected at operand 3 -- `fmls z0\.d,z1\.d,z16\.d\[0\]'
+.*: Error: operand mismatch -- `fmls z0\.q,z1\.q,z2\.q\[0\]'
+.*: Info: did you mean this\?
+.*: Info: fmls z0\.h, z1\.h, z2\.h\[0\]
+.*: Error: operand mismatch -- `fmul z0\.b,z1\.b,z2\.b\[0\]'
+.*: Info: did you mean this\?
+.*: Info: fmul z0\.h, z1\.h, z2\.h\[0\]
+.*: Error: register element index out of range 0 to 7 at operand 3 -- `fmul z0\.h,z1\.h,z2\.h\[-1\]'
+.*: Error: register element index out of range 0 to 7 at operand 3 -- `fmul z0\.h,z1\.h,z2\.h\[8\]'
+.*: Error: z0-z7 expected at operand 3 -- `fmul z0\.h,z1\.h,z8\.h\[0\]'
+.*: Error: register element index out of range 0 to 3 at operand 3 -- `fmul z0\.s,z1\.s,z2\.s\[-1\]'
+.*: Error: register element index out of range 0 to 3 at operand 3 -- `fmul z0\.s,z1\.s,z2\.s\[4\]'
+.*: Error: z0-z7 expected at operand 3 -- `fmul z0\.s,z1\.s,z8\.s\[0\]'
+.*: Error: register element index out of range 0 to 1 at operand 3 -- `fmul z0\.d,z1\.d,z2\.d\[-1\]'
+.*: Error: register element index out of range 0 to 1 at operand 3 -- `fmul z0\.d,z1\.d,z2\.d\[2\]'
+.*: Error: z0-z15 expected at operand 3 -- `fmul z0\.d,z1\.d,z16\.d\[0\]'
+.*: Error: operand mismatch -- `fmul z0\.q,z1\.q,z2\.q\[0\]'
+.*: Info: did you mean this\?
+.*: Info: fmul z0\.h, z1\.h, z2\.h\[0\]
+.*: Error: operand mismatch -- `ld1rqb {z0\.b},p0,\[x0,#0\]'
+.*: Info: did you mean this\?
+.*: Info: ld1rqb {z0\.b}, p0/z, \[x0\]
+.*: Error: operand mismatch -- `ld1rqb {z0\.b},p0/m,\[x0,#0\]'
+.*: Info: did you mean this\?
+.*: Info: ld1rqb {z0\.b}, p0/z, \[x0\]
+.*: Error: p0-p7 expected at operand 2 -- `ld1rqb {z0\.b},p8/z,\[x0,#0\]'
+.*: Error: immediate offset out of range -128 to 112 at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,#-144\]'
+.*: Error: immediate value must be a multiple of 16 at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,#-15\]'
+.*: Error: immediate value must be a multiple of 16 at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,#-14\]'
+.*: Error: immediate value must be a multiple of 16 at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,#-13\]'
+.*: Error: immediate value must be a multiple of 16 at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,#-12\]'
+.*: Error: immediate value must be a multiple of 16 at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,#-11\]'
+.*: Error: immediate value must be a multiple of 16 at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,#-10\]'
+.*: Error: immediate value must be a multiple of 16 at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,#-9\]'
+.*: Error: immediate value must be a multiple of 16 at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,#-8\]'
+.*: Error: immediate value must be a multiple of 16 at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,#-7\]'
+.*: Error: immediate value must be a multiple of 16 at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,#-6\]'
+.*: Error: immediate value must be a multiple of 16 at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,#-5\]'
+.*: Error: immediate value must be a multiple of 16 at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,#-4\]'
+.*: Error: immediate value must be a multiple of 16 at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,#-3\]'
+.*: Error: immediate value must be a multiple of 16 at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,#-2\]'
+.*: Error: immediate value must be a multiple of 16 at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,#-1\]'
+.*: Error: immediate value must be a multiple of 16 at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,#1\]'
+.*: Error: immediate value must be a multiple of 16 at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,#2\]'
+.*: Error: immediate value must be a multiple of 16 at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,#3\]'
+.*: Error: immediate value must be a multiple of 16 at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,#4\]'
+.*: Error: immediate value must be a multiple of 16 at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,#5\]'
+.*: Error: immediate value must be a multiple of 16 at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,#6\]'
+.*: Error: immediate value must be a multiple of 16 at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,#7\]'
+.*: Error: immediate value must be a multiple of 16 at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,#8\]'
+.*: Error: immediate value must be a multiple of 16 at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,#9\]'
+.*: Error: immediate value must be a multiple of 16 at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,#10\]'
+.*: Error: immediate value must be a multiple of 16 at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,#11\]'
+.*: Error: immediate value must be a multiple of 16 at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,#12\]'
+.*: Error: immediate value must be a multiple of 16 at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,#13\]'
+.*: Error: immediate value must be a multiple of 16 at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,#14\]'
+.*: Error: immediate value must be a multiple of 16 at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,#15\]'
+.*: Error: immediate offset out of range -128 to 112 at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,#128\]'
+.*: Error: operand mismatch -- `ld1rqb {z0\.h},p0/z,\[x0,#0\]'
+.*: Info: did you mean this\?
+.*: Info: ld1rqb {z0\.b}, p0/z, \[x0\]
+.*: Error: operand mismatch -- `ld1rqb {z0\.s},p0/z,\[x0,#0\]'
+.*: Info: did you mean this\?
+.*: Info: ld1rqb {z0\.b}, p0/z, \[x0\]
+.*: Error: operand mismatch -- `ld1rqb {z0\.d},p0/z,\[x0,#0\]'
+.*: Info: did you mean this\?
+.*: Info: ld1rqb {z0\.b}, p0/z, \[x0\]
+.*: Error: operand mismatch -- `ld1rqb {z0\.q},p0/z,\[x0,#0\]'
+.*: Info: did you mean this\?
+.*: Info: ld1rqb {z0\.b}, p0/z, \[x0\]
+.*: Error: index register xzr is not allowed at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,xzr\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,x1,lsl#1\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,x1,lsl#2\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,x1,lsl#3\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `ld1rqh {z0\.h},p0/z,\[x0,xzr,lsl#1\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1rqh {z0\.h},p0/z,\[x0,x1\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1rqh {z0\.h},p0/z,\[x0,x1,lsl#2\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1rqh {z0\.h},p0/z,\[x0,x1,lsl#3\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `ld1rqw {z0\.s},p0/z,\[x0,xzr,lsl#2\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1rqw {z0\.s},p0/z,\[x0,x1\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1rqw {z0\.s},p0/z,\[x0,x1,lsl#1\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1rqw {z0\.s},p0/z,\[x0,x1,lsl#3\]'
+.*: Error: index register xzr is not allowed at operand 3 -- `ld1rqd {z0\.d},p0/z,\[x0,xzr,lsl#3\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1rqd {z0\.d},p0/z,\[x0,x1\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1rqd {z0\.d},p0/z,\[x0,x1,lsl#1\]'
+.*: Error: invalid addressing mode at operand 3 -- `ld1rqd {z0\.d},p0/z,\[x0,x1,lsl#2\]'
+.*: Error: operand mismatch -- `sdot z0\.b,z1\.b,z2\.b'
+.*: Info: did you mean this\?
+.*: Info: sdot z0\.s, z1\.b, z2\.b
+.*: Info: other valid variant\(s\):
+.*: Info: sdot z0\.d, z1\.h, z2\.h
+.*: Error: operand mismatch -- `sdot z0\.h,z1\.h,z2\.h'
+.*: Info: did you mean this\?
+.*: Info: sdot z0\.d, z1\.h, z2\.h
+.*: Info: other valid variant\(s\):
+.*: Info: sdot z0\.s, z1\.b, z2\.b
+.*: Error: operand mismatch -- `sdot z0\.s,z1\.s,z2\.s'
+.*: Info: did you mean this\?
+.*: Info: sdot z0\.s, z1\.b, z2\.b
+.*: Info: other valid variant\(s\):
+.*: Info: sdot z0\.d, z1\.h, z2\.h
+.*: Error: operand mismatch -- `sdot z0\.d,z1\.d,z2\.d'
+.*: Info: did you mean this\?
+.*: Info: sdot z0\.d, z1\.h, z2\.h
+.*: Info: other valid variant\(s\):
+.*: Info: sdot z0\.s, z1\.b, z2\.b
+.*: Error: operand mismatch -- `sdot z0\.b,z1\.b,z2\.b\[0\]'
+.*: Info: did you mean this\?
+.*: Info: sdot z0\.s, z1\.b, z2\.b\[0\]
+.*: Error: operand mismatch -- `sdot z0\.h,z1\.h,z2\.h\[0\]'
+.*: Info: did you mean this\?
+.*: Info: sdot z0\.s, z1\.b, z2\.b\[0\]
+.*: Error: operand mismatch -- `sdot z0\.s,z1\.s,z2\.s\[0\]'
+.*: Info: did you mean this\?
+.*: Info: sdot z0\.s, z1\.b, z2\.b\[0\]
+.*: Error: operand mismatch -- `sdot z0\.d,z1\.d,z2\.d\[0\]'
+.*: Info: did you mean this\?
+.*: Info: sdot z0\.s, z1\.b, z2\.b\[0\]
+.*: Error: operand mismatch -- `udot z0\.b,z1\.b,z2\.b'
+.*: Info: did you mean this\?
+.*: Info: udot z0\.s, z1\.b, z2\.b
+.*: Info: other valid variant\(s\):
+.*: Info: udot z0\.d, z1\.h, z2\.h
+.*: Error: operand mismatch -- `udot z0\.h,z1\.h,z2\.h'
+.*: Info: did you mean this\?
+.*: Info: udot z0\.d, z1\.h, z2\.h
+.*: Info: other valid variant\(s\):
+.*: Info: udot z0\.s, z1\.b, z2\.b
+.*: Error: operand mismatch -- `udot z0\.s,z1\.s,z2\.s'
+.*: Info: did you mean this\?
+.*: Info: udot z0\.s, z1\.b, z2\.b
+.*: Info: other valid variant\(s\):
+.*: Info: udot z0\.d, z1\.h, z2\.h
+.*: Error: operand mismatch -- `udot z0\.d,z1\.d,z2\.d'
+.*: Info: did you mean this\?
+.*: Info: udot z0\.d, z1\.h, z2\.h
+.*: Info: other valid variant\(s\):
+.*: Info: udot z0\.s, z1\.b, z2\.b
+.*: Error: operand mismatch -- `udot z0\.b,z1\.b,z2\.b\[0\]'
+.*: Info: did you mean this\?
+.*: Info: udot z0\.s, z1\.b, z2\.b\[0\]
+.*: Error: operand mismatch -- `udot z0\.h,z1\.h,z2\.h\[0\]'
+.*: Info: did you mean this\?
+.*: Info: udot z0\.s, z1\.b, z2\.b\[0\]
+.*: Error: operand mismatch -- `udot z0\.s,z1\.s,z2\.s\[0\]'
+.*: Info: did you mean this\?
+.*: Info: udot z0\.s, z1\.b, z2\.b\[0\]
+.*: Error: operand mismatch -- `udot z0\.d,z1\.d,z2\.d\[0\]'
+.*: Info: did you mean this\?
+.*: Info: udot z0\.s, z1\.b, z2\.b\[0\]
diff --git a/gas/testsuite/gas/aarch64/sve-invalid.s b/gas/testsuite/gas/aarch64/sve-invalid.s
index 0912c52..148dbc8 100644
--- a/gas/testsuite/gas/aarch64/sve-invalid.s
+++ b/gas/testsuite/gas/aarch64/sve-invalid.s
@@ -1161,3 +1161,166 @@
dup z0.d, z1.d[7] // OK
dup z0.d, z1.d[8]
dup z0.d, z1.d[x0]
+
+ fabd z0.b, p0/m, z0.b, z0.b
+ fabd z0.q, p0/m, z0.q, z0.q
+
+ fcadd z0.b, p0/m, z0.b, z0.b, #90
+ fcadd z0.h, p0/m, z0.h, z0.h, #-180
+ fcadd z0.h, p0/m, z0.h, z0.h, #-90
+ fcadd z0.h, p0/m, z0.h, z0.h, #0
+ fcadd z0.h, p0/m, z0.h, z0.h, #89
+ fcadd z0.h, p0/m, z0.h, z0.h, #90.0
+ fcadd z0.h, p0/m, z0.h, z0.h, #180
+ fcadd z0.h, p0/m, z0.h, z0.h, #360
+ fcadd z0.h, p0/m, z0.h, z0.h, #450
+ fcadd z0.h, p0/z, z0.h, z0.h, #90
+ fcadd z0.h, p0/m, z1.h, z0.h, #90
+ fcadd z0.q, p0/m, z0.q, z0.q, #90
+
+ fcmla z0.b, p0/m, z0.b, z0.b, #90
+ fcmla z0.h, p0/m, z0.h, z0.h, #-180
+ fcmla z0.h, p0/m, z0.h, z0.h, #-90
+ fcmla z0.h, p0/m, z0.h, z0.h, #89
+ fcmla z0.h, p0/m, z0.h, z0.h, #90.0
+ fcmla z0.h, p0/m, z0.h, z0.h, #360
+ fcmla z0.h, p0/m, z0.h, z0.h, #450
+ fcmla z0.h, p0/z, z0.h, z0.h, #90
+ fcmla z0.q, p0/m, z0.q, z0.q, #90
+
+ fcmla z0.b, z1.b, z2.b[0], #0
+ fcmla z0.h, z1.h, z2.h[-1], #0
+ fcmla z0.h, z1.h, z2.h[4], #0
+ fcmla z0.h, z1.h, z8.h[0], #0
+ fcmla z0.h, z1.h, z2.h[0], #-180
+ fcmla z0.h, z1.h, z2.h[0], #-90
+ fcmla z0.h, z1.h, z2.h[0], #89
+ fcmla z0.h, z1.h, z2.h[0], #90.0
+ fcmla z0.h, z1.h, z2.h[0], #360
+ fcmla z0.h, z1.h, z2.h[0], #450
+ fcmla z0.s, z1.s, z2.s[-1], #0
+ fcmla z0.s, z1.s, z2.s[2], #0
+ fcmla z0.s, z1.s, z16.s[0], #0
+ fcmla z0.s, z1.s, z2.s[0], #-180
+ fcmla z0.s, z1.s, z2.s[0], #-90
+ fcmla z0.s, z1.s, z2.s[0], #89
+ fcmla z0.s, z1.s, z2.s[0], #90.0
+ fcmla z0.s, z1.s, z2.s[0], #360
+ fcmla z0.s, z1.s, z2.s[0], #450
+ fcmla z0.q, z1.q, z2.q[0], #0
+
+ fmla z0.b, z1.b, z2.b[0]
+ fmla z0.h, z1.h, z2.h[-1]
+ fmla z0.h, z1.h, z2.h[8]
+ fmla z0.h, z1.h, z8.h[0]
+ fmla z0.s, z1.s, z2.s[-1]
+ fmla z0.s, z1.s, z2.s[4]
+ fmla z0.s, z1.s, z8.s[0]
+ fmla z0.d, z1.d, z2.d[-1]
+ fmla z0.d, z1.d, z2.d[2]
+ fmla z0.d, z1.d, z16.d[0]
+ fmla z0.q, z1.q, z2.q[0]
+
+ fmls z0.b, z1.b, z2.b[0]
+ fmls z0.h, z1.h, z2.h[-1]
+ fmls z0.h, z1.h, z2.h[8]
+ fmls z0.h, z1.h, z8.h[0]
+ fmls z0.s, z1.s, z2.s[-1]
+ fmls z0.s, z1.s, z2.s[4]
+ fmls z0.s, z1.s, z8.s[0]
+ fmls z0.d, z1.d, z2.d[-1]
+ fmls z0.d, z1.d, z2.d[2]
+ fmls z0.d, z1.d, z16.d[0]
+ fmls z0.q, z1.q, z2.q[0]
+
+ fmul z0.b, z1.b, z2.b[0]
+ fmul z0.h, z1.h, z2.h[-1]
+ fmul z0.h, z1.h, z2.h[8]
+ fmul z0.h, z1.h, z8.h[0]
+ fmul z0.s, z1.s, z2.s[-1]
+ fmul z0.s, z1.s, z2.s[4]
+ fmul z0.s, z1.s, z8.s[0]
+ fmul z0.d, z1.d, z2.d[-1]
+ fmul z0.d, z1.d, z2.d[2]
+ fmul z0.d, z1.d, z16.d[0]
+ fmul z0.q, z1.q, z2.q[0]
+
+ ld1rqb {z0.b}, p0, [x0, #0]
+ ld1rqb {z0.b}, p0/m, [x0, #0]
+ ld1rqb {z0.b}, p8/z, [x0, #0]
+ ld1rqb {z0.b}, p0/z, [x0, #-144]
+ ld1rqb {z0.b}, p0/z, [x0, #-15]
+ ld1rqb {z0.b}, p0/z, [x0, #-14]
+ ld1rqb {z0.b}, p0/z, [x0, #-13]
+ ld1rqb {z0.b}, p0/z, [x0, #-12]
+ ld1rqb {z0.b}, p0/z, [x0, #-11]
+ ld1rqb {z0.b}, p0/z, [x0, #-10]
+ ld1rqb {z0.b}, p0/z, [x0, #-9]
+ ld1rqb {z0.b}, p0/z, [x0, #-8]
+ ld1rqb {z0.b}, p0/z, [x0, #-7]
+ ld1rqb {z0.b}, p0/z, [x0, #-6]
+ ld1rqb {z0.b}, p0/z, [x0, #-5]
+ ld1rqb {z0.b}, p0/z, [x0, #-4]
+ ld1rqb {z0.b}, p0/z, [x0, #-3]
+ ld1rqb {z0.b}, p0/z, [x0, #-2]
+ ld1rqb {z0.b}, p0/z, [x0, #-1]
+ ld1rqb {z0.b}, p0/z, [x0, #1]
+ ld1rqb {z0.b}, p0/z, [x0, #2]
+ ld1rqb {z0.b}, p0/z, [x0, #3]
+ ld1rqb {z0.b}, p0/z, [x0, #4]
+ ld1rqb {z0.b}, p0/z, [x0, #5]
+ ld1rqb {z0.b}, p0/z, [x0, #6]
+ ld1rqb {z0.b}, p0/z, [x0, #7]
+ ld1rqb {z0.b}, p0/z, [x0, #8]
+ ld1rqb {z0.b}, p0/z, [x0, #9]
+ ld1rqb {z0.b}, p0/z, [x0, #10]
+ ld1rqb {z0.b}, p0/z, [x0, #11]
+ ld1rqb {z0.b}, p0/z, [x0, #12]
+ ld1rqb {z0.b}, p0/z, [x0, #13]
+ ld1rqb {z0.b}, p0/z, [x0, #14]
+ ld1rqb {z0.b}, p0/z, [x0, #15]
+ ld1rqb {z0.b}, p0/z, [x0, #128]
+ ld1rqb {z0.h}, p0/z, [x0, #0]
+ ld1rqb {z0.s}, p0/z, [x0, #0]
+ ld1rqb {z0.d}, p0/z, [x0, #0]
+ ld1rqb {z0.q}, p0/z, [x0, #0]
+
+ ld1rqb {z0.b}, p0/z, [x0, xzr]
+ ld1rqb {z0.b}, p0/z, [x0, x1, lsl #1]
+ ld1rqb {z0.b}, p0/z, [x0, x1, lsl #2]
+ ld1rqb {z0.b}, p0/z, [x0, x1, lsl #3]
+
+ ld1rqh {z0.h}, p0/z, [x0, xzr, lsl #1]
+ ld1rqh {z0.h}, p0/z, [x0, x1]
+ ld1rqh {z0.h}, p0/z, [x0, x1, lsl #2]
+ ld1rqh {z0.h}, p0/z, [x0, x1, lsl #3]
+
+ ld1rqw {z0.s}, p0/z, [x0, xzr, lsl #2]
+ ld1rqw {z0.s}, p0/z, [x0, x1]
+ ld1rqw {z0.s}, p0/z, [x0, x1, lsl #1]
+ ld1rqw {z0.s}, p0/z, [x0, x1, lsl #3]
+
+ ld1rqd {z0.d}, p0/z, [x0, xzr, lsl #3]
+ ld1rqd {z0.d}, p0/z, [x0, x1]
+ ld1rqd {z0.d}, p0/z, [x0, x1, lsl #1]
+ ld1rqd {z0.d}, p0/z, [x0, x1, lsl #2]
+
+ sdot z0.b, z1.b, z2.b
+ sdot z0.h, z1.h, z2.h
+ sdot z0.s, z1.s, z2.s
+ sdot z0.d, z1.d, z2.d
+
+ sdot z0.b, z1.b, z2.b[0]
+ sdot z0.h, z1.h, z2.h[0]
+ sdot z0.s, z1.s, z2.s[0]
+ sdot z0.d, z1.d, z2.d[0]
+
+ udot z0.b, z1.b, z2.b
+ udot z0.h, z1.h, z2.h
+ udot z0.s, z1.s, z2.s
+ udot z0.d, z1.d, z2.d
+
+ udot z0.b, z1.b, z2.b[0]
+ udot z0.h, z1.h, z2.h[0]
+ udot z0.s, z1.s, z2.s[0]
+ udot z0.d, z1.d, z2.d[0]
diff --git a/gas/testsuite/gas/aarch64/sve.d b/gas/testsuite/gas/aarch64/sve.d
index 4b976ef..5c7c519 100644
--- a/gas/testsuite/gas/aarch64/sve.d
+++ b/gas/testsuite/gas/aarch64/sve.d
@@ -1,4 +1,4 @@
-#as: -march=armv8-a+sve
+#as: -march=armv8-a+sve -I$srcdir/$subdir
#objdump: -dr
.* file format .*
@@ -6,6 +6,24 @@
Disassembly of section .*:
0+ <.*>:
+.*: 2579c000 fmov z0\.h, #2\.0+e\+00
+.*: 2579c000 fmov z0\.h, #2\.0+e\+00
+.*: 2579c001 fmov z1\.h, #2\.0+e\+00
+.*: 2579c001 fmov z1\.h, #2\.0+e\+00
+.*: 2579c01f fmov z31\.h, #2\.0+e\+00
+.*: 2579c01f fmov z31\.h, #2\.0+e\+00
+.*: 2579c600 fmov z0\.h, #1\.60+e\+01
+.*: 2579c600 fmov z0\.h, #1\.60+e\+01
+.*: 2579c900 fmov z0\.h, #1\.8750+e-01
+.*: 2579c900 fmov z0\.h, #1\.8750+e-01
+.*: 2579cfe0 fmov z0\.h, #1\.93750+e\+00
+.*: 2579cfe0 fmov z0\.h, #1\.93750+e\+00
+.*: 2579d100 fmov z0\.h, #-3\.0+e\+00
+.*: 2579d100 fmov z0\.h, #-3\.0+e\+00
+.*: 2579d800 fmov z0\.h, #-1\.250+e-01
+.*: 2579d800 fmov z0\.h, #-1\.250+e-01
+.*: 2579dfe0 fmov z0\.h, #-1\.93750+e\+00
+.*: 2579dfe0 fmov z0\.h, #-1\.93750+e\+00
.*: 25b9c000 fmov z0\.s, #2\.0+e\+00
.*: 25b9c000 fmov z0\.s, #2\.0+e\+00
.*: 25b9c001 fmov z1\.s, #2\.0+e\+00
@@ -42,6 +60,28 @@ Disassembly of section .*:
.*: 25f9d800 fmov z0\.d, #-1\.250+e-01
.*: 25f9dfe0 fmov z0\.d, #-1\.93750+e\+00
.*: 25f9dfe0 fmov z0\.d, #-1\.93750+e\+00
+.*: 0550c000 fmov z0\.h, p0/m, #2\.0+e\+00
+.*: 0550c000 fmov z0\.h, p0/m, #2\.0+e\+00
+.*: 0550c001 fmov z1\.h, p0/m, #2\.0+e\+00
+.*: 0550c001 fmov z1\.h, p0/m, #2\.0+e\+00
+.*: 0550c01f fmov z31\.h, p0/m, #2\.0+e\+00
+.*: 0550c01f fmov z31\.h, p0/m, #2\.0+e\+00
+.*: 0552c000 fmov z0\.h, p2/m, #2\.0+e\+00
+.*: 0552c000 fmov z0\.h, p2/m, #2\.0+e\+00
+.*: 055fc000 fmov z0\.h, p15/m, #2\.0+e\+00
+.*: 055fc000 fmov z0\.h, p15/m, #2\.0+e\+00
+.*: 0550c600 fmov z0\.h, p0/m, #1\.60+e\+01
+.*: 0550c600 fmov z0\.h, p0/m, #1\.60+e\+01
+.*: 0550c900 fmov z0\.h, p0/m, #1\.8750+e-01
+.*: 0550c900 fmov z0\.h, p0/m, #1\.8750+e-01
+.*: 0550cfe0 fmov z0\.h, p0/m, #1\.93750+e\+00
+.*: 0550cfe0 fmov z0\.h, p0/m, #1\.93750+e\+00
+.*: 0550d100 fmov z0\.h, p0/m, #-3\.0+e\+00
+.*: 0550d100 fmov z0\.h, p0/m, #-3\.0+e\+00
+.*: 0550d800 fmov z0\.h, p0/m, #-1\.250+e-01
+.*: 0550d800 fmov z0\.h, p0/m, #-1\.250+e-01
+.*: 0550dfe0 fmov z0\.h, p0/m, #-1\.93750+e\+00
+.*: 0550dfe0 fmov z0\.h, p0/m, #-1\.93750+e\+00
.*: 0590c000 fmov z0\.s, p0/m, #2\.0+e\+00
.*: 0590c000 fmov z0\.s, p0/m, #2\.0+e\+00
.*: 0590c001 fmov z1\.s, p0/m, #2\.0+e\+00
@@ -136,6 +176,16 @@ Disassembly of section .*:
.*: 05282040 mov z0\.d, d2
.*: 052823e0 mov z0\.d, d31
.*: 052823e0 mov z0\.d, d31
+.*: 05302000 mov z0\.q, q0
+.*: 05302000 mov z0\.q, q0
+.*: 05302001 mov z1\.q, q0
+.*: 05302001 mov z1\.q, q0
+.*: 0530201f mov z31\.q, q0
+.*: 0530201f mov z31\.q, q0
+.*: 05302040 mov z0\.q, q2
+.*: 05302040 mov z0\.q, q2
+.*: 053023e0 mov z0\.q, q31
+.*: 053023e0 mov z0\.q, q31
.*: 05203800 mov z0\.b, w0
.*: 05203800 mov z0\.b, w0
.*: 05203801 mov z1\.b, w0
@@ -314,6 +364,22 @@ Disassembly of section .*:
.*: 052f23e0 mov z0\.b, z31\.b\[7\]
.*: 05312000 mov z0\.b, z0\.b\[8\]
.*: 05312000 mov z0\.b, z0\.b\[8\]
+.*: 05702000 mov z0\.q, z0\.q\[1\]
+.*: 05702000 mov z0\.q, z0\.q\[1\]
+.*: 05702001 mov z1\.q, z0\.q\[1\]
+.*: 05702001 mov z1\.q, z0\.q\[1\]
+.*: 0570201f mov z31\.q, z0\.q\[1\]
+.*: 0570201f mov z31\.q, z0\.q\[1\]
+.*: 05702040 mov z0\.q, z2\.q\[1\]
+.*: 05702040 mov z0\.q, z2\.q\[1\]
+.*: 057023e0 mov z0\.q, z31\.q\[1\]
+.*: 057023e0 mov z0\.q, z31\.q\[1\]
+.*: 05302000 mov z0\.q, q0
+.*: 05302000 mov z0\.q, q0
+.*: 05b02000 mov z0\.q, z0\.q\[2\]
+.*: 05b02000 mov z0\.q, z0\.q\[2\]
+.*: 05f02000 mov z0\.q, z0\.q\[3\]
+.*: 05f02000 mov z0\.q, z0\.q\[3\]
.*: 05c000e0 mov z0\.s, #0xff
.*: 05c000e0 mov z0\.s, #0xff
.*: 05c000e0 mov z0\.s, #0xff
@@ -7645,6 +7711,22 @@ Disassembly of section .*:
.*: 052f23e0 mov z0\.b, z31\.b\[7\]
.*: 05312000 mov z0\.b, z0\.b\[8\]
.*: 05312000 mov z0\.b, z0\.b\[8\]
+.*: 05702000 mov z0\.q, z0\.q\[1\]
+.*: 05702000 mov z0\.q, z0\.q\[1\]
+.*: 05702001 mov z1\.q, z0\.q\[1\]
+.*: 05702001 mov z1\.q, z0\.q\[1\]
+.*: 0570201f mov z31\.q, z0\.q\[1\]
+.*: 0570201f mov z31\.q, z0\.q\[1\]
+.*: 05702040 mov z0\.q, z2\.q\[1\]
+.*: 05702040 mov z0\.q, z2\.q\[1\]
+.*: 057023e0 mov z0\.q, z31\.q\[1\]
+.*: 057023e0 mov z0\.q, z31\.q\[1\]
+.*: 05302000 mov z0\.q, q0
+.*: 05302000 mov z0\.q, q0
+.*: 05b02000 mov z0\.q, z0\.q\[2\]
+.*: 05b02000 mov z0\.q, z0\.q\[2\]
+.*: 05f02000 mov z0\.q, z0\.q\[3\]
+.*: 05f02000 mov z0\.q, z0\.q\[3\]
.*: 2538c000 mov z0\.b, #0
.*: 2538c000 mov z0\.b, #0
.*: 2538c000 mov z0\.b, #0
@@ -8092,6 +8174,22 @@ Disassembly of section .*:
.*: 05300400 ext z0\.b, z0\.b, z0\.b, #129
.*: 053f1c00 ext z0\.b, z0\.b, z0\.b, #255
.*: 053f1c00 ext z0\.b, z0\.b, z0\.b, #255
+.*: 65488000 fabd z0\.h, p0/m, z0\.h, z0\.h
+.*: 65488000 fabd z0\.h, p0/m, z0\.h, z0\.h
+.*: 65488001 fabd z1\.h, p0/m, z1\.h, z0\.h
+.*: 65488001 fabd z1\.h, p0/m, z1\.h, z0\.h
+.*: 6548801f fabd z31\.h, p0/m, z31\.h, z0\.h
+.*: 6548801f fabd z31\.h, p0/m, z31\.h, z0\.h
+.*: 65488800 fabd z0\.h, p2/m, z0\.h, z0\.h
+.*: 65488800 fabd z0\.h, p2/m, z0\.h, z0\.h
+.*: 65489c00 fabd z0\.h, p7/m, z0\.h, z0\.h
+.*: 65489c00 fabd z0\.h, p7/m, z0\.h, z0\.h
+.*: 65488003 fabd z3\.h, p0/m, z3\.h, z0\.h
+.*: 65488003 fabd z3\.h, p0/m, z3\.h, z0\.h
+.*: 65488080 fabd z0\.h, p0/m, z0\.h, z4\.h
+.*: 65488080 fabd z0\.h, p0/m, z0\.h, z4\.h
+.*: 654883e0 fabd z0\.h, p0/m, z0\.h, z31\.h
+.*: 654883e0 fabd z0\.h, p0/m, z0\.h, z31\.h
.*: 65888000 fabd z0\.s, p0/m, z0\.s, z0\.s
.*: 65888000 fabd z0\.s, p0/m, z0\.s, z0\.s
.*: 65888001 fabd z1\.s, p0/m, z1\.s, z0\.s
@@ -8124,6 +8222,20 @@ Disassembly of section .*:
.*: 65c88080 fabd z0\.d, p0/m, z0\.d, z4\.d
.*: 65c883e0 fabd z0\.d, p0/m, z0\.d, z31\.d
.*: 65c883e0 fabd z0\.d, p0/m, z0\.d, z31\.d
+.*: 045ca000 fabs z0\.h, p0/m, z0\.h
+.*: 045ca000 fabs z0\.h, p0/m, z0\.h
+.*: 045ca001 fabs z1\.h, p0/m, z0\.h
+.*: 045ca001 fabs z1\.h, p0/m, z0\.h
+.*: 045ca01f fabs z31\.h, p0/m, z0\.h
+.*: 045ca01f fabs z31\.h, p0/m, z0\.h
+.*: 045ca800 fabs z0\.h, p2/m, z0\.h
+.*: 045ca800 fabs z0\.h, p2/m, z0\.h
+.*: 045cbc00 fabs z0\.h, p7/m, z0\.h
+.*: 045cbc00 fabs z0\.h, p7/m, z0\.h
+.*: 045ca060 fabs z0\.h, p0/m, z3\.h
+.*: 045ca060 fabs z0\.h, p0/m, z3\.h
+.*: 045ca3e0 fabs z0\.h, p0/m, z31\.h
+.*: 045ca3e0 fabs z0\.h, p0/m, z31\.h
.*: 049ca000 fabs z0\.s, p0/m, z0\.s
.*: 049ca000 fabs z0\.s, p0/m, z0\.s
.*: 049ca001 fabs z1\.s, p0/m, z0\.s
@@ -8152,6 +8264,24 @@ Disassembly of section .*:
.*: 04dca060 fabs z0\.d, p0/m, z3\.d
.*: 04dca3e0 fabs z0\.d, p0/m, z31\.d
.*: 04dca3e0 fabs z0\.d, p0/m, z31\.d
+.*: 6540c010 facge p0\.h, p0/z, z0\.h, z0\.h
+.*: 6540c010 facge p0\.h, p0/z, z0\.h, z0\.h
+.*: 6540c011 facge p1\.h, p0/z, z0\.h, z0\.h
+.*: 6540c011 facge p1\.h, p0/z, z0\.h, z0\.h
+.*: 6540c01f facge p15\.h, p0/z, z0\.h, z0\.h
+.*: 6540c01f facge p15\.h, p0/z, z0\.h, z0\.h
+.*: 6540c810 facge p0\.h, p2/z, z0\.h, z0\.h
+.*: 6540c810 facge p0\.h, p2/z, z0\.h, z0\.h
+.*: 6540dc10 facge p0\.h, p7/z, z0\.h, z0\.h
+.*: 6540dc10 facge p0\.h, p7/z, z0\.h, z0\.h
+.*: 6540c070 facge p0\.h, p0/z, z3\.h, z0\.h
+.*: 6540c070 facge p0\.h, p0/z, z3\.h, z0\.h
+.*: 6540c3f0 facge p0\.h, p0/z, z31\.h, z0\.h
+.*: 6540c3f0 facge p0\.h, p0/z, z31\.h, z0\.h
+.*: 6544c010 facge p0\.h, p0/z, z0\.h, z4\.h
+.*: 6544c010 facge p0\.h, p0/z, z0\.h, z4\.h
+.*: 655fc010 facge p0\.h, p0/z, z0\.h, z31\.h
+.*: 655fc010 facge p0\.h, p0/z, z0\.h, z31\.h
.*: 6580c010 facge p0\.s, p0/z, z0\.s, z0\.s
.*: 6580c010 facge p0\.s, p0/z, z0\.s, z0\.s
.*: 6580c011 facge p1\.s, p0/z, z0\.s, z0\.s
@@ -8188,6 +8318,24 @@ Disassembly of section .*:
.*: 65c4c010 facge p0\.d, p0/z, z0\.d, z4\.d
.*: 65dfc010 facge p0\.d, p0/z, z0\.d, z31\.d
.*: 65dfc010 facge p0\.d, p0/z, z0\.d, z31\.d
+.*: 6540e010 facgt p0\.h, p0/z, z0\.h, z0\.h
+.*: 6540e010 facgt p0\.h, p0/z, z0\.h, z0\.h
+.*: 6540e011 facgt p1\.h, p0/z, z0\.h, z0\.h
+.*: 6540e011 facgt p1\.h, p0/z, z0\.h, z0\.h
+.*: 6540e01f facgt p15\.h, p0/z, z0\.h, z0\.h
+.*: 6540e01f facgt p15\.h, p0/z, z0\.h, z0\.h
+.*: 6540e810 facgt p0\.h, p2/z, z0\.h, z0\.h
+.*: 6540e810 facgt p0\.h, p2/z, z0\.h, z0\.h
+.*: 6540fc10 facgt p0\.h, p7/z, z0\.h, z0\.h
+.*: 6540fc10 facgt p0\.h, p7/z, z0\.h, z0\.h
+.*: 6540e070 facgt p0\.h, p0/z, z3\.h, z0\.h
+.*: 6540e070 facgt p0\.h, p0/z, z3\.h, z0\.h
+.*: 6540e3f0 facgt p0\.h, p0/z, z31\.h, z0\.h
+.*: 6540e3f0 facgt p0\.h, p0/z, z31\.h, z0\.h
+.*: 6544e010 facgt p0\.h, p0/z, z0\.h, z4\.h
+.*: 6544e010 facgt p0\.h, p0/z, z0\.h, z4\.h
+.*: 655fe010 facgt p0\.h, p0/z, z0\.h, z31\.h
+.*: 655fe010 facgt p0\.h, p0/z, z0\.h, z31\.h
.*: 6580e010 facgt p0\.s, p0/z, z0\.s, z0\.s
.*: 6580e010 facgt p0\.s, p0/z, z0\.s, z0\.s
.*: 6580e011 facgt p1\.s, p0/z, z0\.s, z0\.s
@@ -8224,6 +8372,20 @@ Disassembly of section .*:
.*: 65c4e010 facgt p0\.d, p0/z, z0\.d, z4\.d
.*: 65dfe010 facgt p0\.d, p0/z, z0\.d, z31\.d
.*: 65dfe010 facgt p0\.d, p0/z, z0\.d, z31\.d
+.*: 65400000 fadd z0\.h, z0\.h, z0\.h
+.*: 65400000 fadd z0\.h, z0\.h, z0\.h
+.*: 65400001 fadd z1\.h, z0\.h, z0\.h
+.*: 65400001 fadd z1\.h, z0\.h, z0\.h
+.*: 6540001f fadd z31\.h, z0\.h, z0\.h
+.*: 6540001f fadd z31\.h, z0\.h, z0\.h
+.*: 65400040 fadd z0\.h, z2\.h, z0\.h
+.*: 65400040 fadd z0\.h, z2\.h, z0\.h
+.*: 654003e0 fadd z0\.h, z31\.h, z0\.h
+.*: 654003e0 fadd z0\.h, z31\.h, z0\.h
+.*: 65430000 fadd z0\.h, z0\.h, z3\.h
+.*: 65430000 fadd z0\.h, z0\.h, z3\.h
+.*: 655f0000 fadd z0\.h, z0\.h, z31\.h
+.*: 655f0000 fadd z0\.h, z0\.h, z31\.h
.*: 65800000 fadd z0\.s, z0\.s, z0\.s
.*: 65800000 fadd z0\.s, z0\.s, z0\.s
.*: 65800001 fadd z1\.s, z0\.s, z0\.s
@@ -8252,6 +8414,22 @@ Disassembly of section .*:
.*: 65c30000 fadd z0\.d, z0\.d, z3\.d
.*: 65df0000 fadd z0\.d, z0\.d, z31\.d
.*: 65df0000 fadd z0\.d, z0\.d, z31\.d
+.*: 65408000 fadd z0\.h, p0/m, z0\.h, z0\.h
+.*: 65408000 fadd z0\.h, p0/m, z0\.h, z0\.h
+.*: 65408001 fadd z1\.h, p0/m, z1\.h, z0\.h
+.*: 65408001 fadd z1\.h, p0/m, z1\.h, z0\.h
+.*: 6540801f fadd z31\.h, p0/m, z31\.h, z0\.h
+.*: 6540801f fadd z31\.h, p0/m, z31\.h, z0\.h
+.*: 65408800 fadd z0\.h, p2/m, z0\.h, z0\.h
+.*: 65408800 fadd z0\.h, p2/m, z0\.h, z0\.h
+.*: 65409c00 fadd z0\.h, p7/m, z0\.h, z0\.h
+.*: 65409c00 fadd z0\.h, p7/m, z0\.h, z0\.h
+.*: 65408003 fadd z3\.h, p0/m, z3\.h, z0\.h
+.*: 65408003 fadd z3\.h, p0/m, z3\.h, z0\.h
+.*: 65408080 fadd z0\.h, p0/m, z0\.h, z4\.h
+.*: 65408080 fadd z0\.h, p0/m, z0\.h, z4\.h
+.*: 654083e0 fadd z0\.h, p0/m, z0\.h, z31\.h
+.*: 654083e0 fadd z0\.h, p0/m, z0\.h, z31\.h
.*: 65808000 fadd z0\.s, p0/m, z0\.s, z0\.s
.*: 65808000 fadd z0\.s, p0/m, z0\.s, z0\.s
.*: 65808001 fadd z1\.s, p0/m, z1\.s, z0\.s
@@ -8284,6 +8462,34 @@ Disassembly of section .*:
.*: 65c08080 fadd z0\.d, p0/m, z0\.d, z4\.d
.*: 65c083e0 fadd z0\.d, p0/m, z0\.d, z31\.d
.*: 65c083e0 fadd z0\.d, p0/m, z0\.d, z31\.d
+.*: 65588000 fadd z0\.h, p0/m, z0\.h, #0\.5
+.*: 65588000 fadd z0\.h, p0/m, z0\.h, #0\.5
+.*: 65588000 fadd z0\.h, p0/m, z0\.h, #0\.5
+.*: 65588000 fadd z0\.h, p0/m, z0\.h, #0\.5
+.*: 65588001 fadd z1\.h, p0/m, z1\.h, #0\.5
+.*: 65588001 fadd z1\.h, p0/m, z1\.h, #0\.5
+.*: 65588001 fadd z1\.h, p0/m, z1\.h, #0\.5
+.*: 65588001 fadd z1\.h, p0/m, z1\.h, #0\.5
+.*: 6558801f fadd z31\.h, p0/m, z31\.h, #0\.5
+.*: 6558801f fadd z31\.h, p0/m, z31\.h, #0\.5
+.*: 6558801f fadd z31\.h, p0/m, z31\.h, #0\.5
+.*: 6558801f fadd z31\.h, p0/m, z31\.h, #0\.5
+.*: 65588800 fadd z0\.h, p2/m, z0\.h, #0\.5
+.*: 65588800 fadd z0\.h, p2/m, z0\.h, #0\.5
+.*: 65588800 fadd z0\.h, p2/m, z0\.h, #0\.5
+.*: 65588800 fadd z0\.h, p2/m, z0\.h, #0\.5
+.*: 65589c00 fadd z0\.h, p7/m, z0\.h, #0\.5
+.*: 65589c00 fadd z0\.h, p7/m, z0\.h, #0\.5
+.*: 65589c00 fadd z0\.h, p7/m, z0\.h, #0\.5
+.*: 65589c00 fadd z0\.h, p7/m, z0\.h, #0\.5
+.*: 65588003 fadd z3\.h, p0/m, z3\.h, #0\.5
+.*: 65588003 fadd z3\.h, p0/m, z3\.h, #0\.5
+.*: 65588003 fadd z3\.h, p0/m, z3\.h, #0\.5
+.*: 65588003 fadd z3\.h, p0/m, z3\.h, #0\.5
+.*: 65588020 fadd z0\.h, p0/m, z0\.h, #1\.0
+.*: 65588020 fadd z0\.h, p0/m, z0\.h, #1\.0
+.*: 65588020 fadd z0\.h, p0/m, z0\.h, #1\.0
+.*: 65588020 fadd z0\.h, p0/m, z0\.h, #1\.0
.*: 65988000 fadd z0\.s, p0/m, z0\.s, #0\.5
.*: 65988000 fadd z0\.s, p0/m, z0\.s, #0\.5
.*: 65988000 fadd z0\.s, p0/m, z0\.s, #0\.5
@@ -8340,6 +8546,22 @@ Disassembly of section .*:
.*: 65d88020 fadd z0\.d, p0/m, z0\.d, #1\.0
.*: 65d88020 fadd z0\.d, p0/m, z0\.d, #1\.0
.*: 65d88020 fadd z0\.d, p0/m, z0\.d, #1\.0
+.*: 65582000 fadda h0, p0, h0, z0\.h
+.*: 65582000 fadda h0, p0, h0, z0\.h
+.*: 65582001 fadda h1, p0, h1, z0\.h
+.*: 65582001 fadda h1, p0, h1, z0\.h
+.*: 6558201f fadda h31, p0, h31, z0\.h
+.*: 6558201f fadda h31, p0, h31, z0\.h
+.*: 65582800 fadda h0, p2, h0, z0\.h
+.*: 65582800 fadda h0, p2, h0, z0\.h
+.*: 65583c00 fadda h0, p7, h0, z0\.h
+.*: 65583c00 fadda h0, p7, h0, z0\.h
+.*: 65582003 fadda h3, p0, h3, z0\.h
+.*: 65582003 fadda h3, p0, h3, z0\.h
+.*: 65582080 fadda h0, p0, h0, z4\.h
+.*: 65582080 fadda h0, p0, h0, z4\.h
+.*: 655823e0 fadda h0, p0, h0, z31\.h
+.*: 655823e0 fadda h0, p0, h0, z31\.h
.*: 65982000 fadda s0, p0, s0, z0\.s
.*: 65982000 fadda s0, p0, s0, z0\.s
.*: 65982001 fadda s1, p0, s1, z0\.s
@@ -8372,6 +8594,20 @@ Disassembly of section .*:
.*: 65d82080 fadda d0, p0, d0, z4\.d
.*: 65d823e0 fadda d0, p0, d0, z31\.d
.*: 65d823e0 fadda d0, p0, d0, z31\.d
+.*: 65402000 faddv h0, p0, z0\.h
+.*: 65402000 faddv h0, p0, z0\.h
+.*: 65402001 faddv h1, p0, z0\.h
+.*: 65402001 faddv h1, p0, z0\.h
+.*: 6540201f faddv h31, p0, z0\.h
+.*: 6540201f faddv h31, p0, z0\.h
+.*: 65402800 faddv h0, p2, z0\.h
+.*: 65402800 faddv h0, p2, z0\.h
+.*: 65403c00 faddv h0, p7, z0\.h
+.*: 65403c00 faddv h0, p7, z0\.h
+.*: 65402060 faddv h0, p0, z3\.h
+.*: 65402060 faddv h0, p0, z3\.h
+.*: 654023e0 faddv h0, p0, z31\.h
+.*: 654023e0 faddv h0, p0, z31\.h
.*: 65802000 faddv s0, p0, z0\.s
.*: 65802000 faddv s0, p0, z0\.s
.*: 65802001 faddv s1, p0, z0\.s
@@ -8400,6 +8636,202 @@ Disassembly of section .*:
.*: 65c02060 faddv d0, p0, z3\.d
.*: 65c023e0 faddv d0, p0, z31\.d
.*: 65c023e0 faddv d0, p0, z31\.d
+.*: 64408000 fcadd z0\.h, p0/m, z0\.h, z0\.h, #90
+.*: 64408000 fcadd z0\.h, p0/m, z0\.h, z0\.h, #90
+.*: 64408001 fcadd z1\.h, p0/m, z1\.h, z0\.h, #90
+.*: 64408001 fcadd z1\.h, p0/m, z1\.h, z0\.h, #90
+.*: 6440801f fcadd z31\.h, p0/m, z31\.h, z0\.h, #90
+.*: 6440801f fcadd z31\.h, p0/m, z31\.h, z0\.h, #90
+.*: 64408800 fcadd z0\.h, p2/m, z0\.h, z0\.h, #90
+.*: 64408800 fcadd z0\.h, p2/m, z0\.h, z0\.h, #90
+.*: 64409c00 fcadd z0\.h, p7/m, z0\.h, z0\.h, #90
+.*: 64409c00 fcadd z0\.h, p7/m, z0\.h, z0\.h, #90
+.*: 64408003 fcadd z3\.h, p0/m, z3\.h, z0\.h, #90
+.*: 64408003 fcadd z3\.h, p0/m, z3\.h, z0\.h, #90
+.*: 64408080 fcadd z0\.h, p0/m, z0\.h, z4\.h, #90
+.*: 64408080 fcadd z0\.h, p0/m, z0\.h, z4\.h, #90
+.*: 644083e0 fcadd z0\.h, p0/m, z0\.h, z31\.h, #90
+.*: 644083e0 fcadd z0\.h, p0/m, z0\.h, z31\.h, #90
+.*: 64418000 fcadd z0\.h, p0/m, z0\.h, z0\.h, #270
+.*: 64418000 fcadd z0\.h, p0/m, z0\.h, z0\.h, #270
+.*: 64808000 fcadd z0\.s, p0/m, z0\.s, z0\.s, #90
+.*: 64808000 fcadd z0\.s, p0/m, z0\.s, z0\.s, #90
+.*: 64808001 fcadd z1\.s, p0/m, z1\.s, z0\.s, #90
+.*: 64808001 fcadd z1\.s, p0/m, z1\.s, z0\.s, #90
+.*: 6480801f fcadd z31\.s, p0/m, z31\.s, z0\.s, #90
+.*: 6480801f fcadd z31\.s, p0/m, z31\.s, z0\.s, #90
+.*: 64808800 fcadd z0\.s, p2/m, z0\.s, z0\.s, #90
+.*: 64808800 fcadd z0\.s, p2/m, z0\.s, z0\.s, #90
+.*: 64809c00 fcadd z0\.s, p7/m, z0\.s, z0\.s, #90
+.*: 64809c00 fcadd z0\.s, p7/m, z0\.s, z0\.s, #90
+.*: 64808003 fcadd z3\.s, p0/m, z3\.s, z0\.s, #90
+.*: 64808003 fcadd z3\.s, p0/m, z3\.s, z0\.s, #90
+.*: 64808080 fcadd z0\.s, p0/m, z0\.s, z4\.s, #90
+.*: 64808080 fcadd z0\.s, p0/m, z0\.s, z4\.s, #90
+.*: 648083e0 fcadd z0\.s, p0/m, z0\.s, z31\.s, #90
+.*: 648083e0 fcadd z0\.s, p0/m, z0\.s, z31\.s, #90
+.*: 64818000 fcadd z0\.s, p0/m, z0\.s, z0\.s, #270
+.*: 64818000 fcadd z0\.s, p0/m, z0\.s, z0\.s, #270
+.*: 64c08000 fcadd z0\.d, p0/m, z0\.d, z0\.d, #90
+.*: 64c08000 fcadd z0\.d, p0/m, z0\.d, z0\.d, #90
+.*: 64c08001 fcadd z1\.d, p0/m, z1\.d, z0\.d, #90
+.*: 64c08001 fcadd z1\.d, p0/m, z1\.d, z0\.d, #90
+.*: 64c0801f fcadd z31\.d, p0/m, z31\.d, z0\.d, #90
+.*: 64c0801f fcadd z31\.d, p0/m, z31\.d, z0\.d, #90
+.*: 64c08800 fcadd z0\.d, p2/m, z0\.d, z0\.d, #90
+.*: 64c08800 fcadd z0\.d, p2/m, z0\.d, z0\.d, #90
+.*: 64c09c00 fcadd z0\.d, p7/m, z0\.d, z0\.d, #90
+.*: 64c09c00 fcadd z0\.d, p7/m, z0\.d, z0\.d, #90
+.*: 64c08003 fcadd z3\.d, p0/m, z3\.d, z0\.d, #90
+.*: 64c08003 fcadd z3\.d, p0/m, z3\.d, z0\.d, #90
+.*: 64c08080 fcadd z0\.d, p0/m, z0\.d, z4\.d, #90
+.*: 64c08080 fcadd z0\.d, p0/m, z0\.d, z4\.d, #90
+.*: 64c083e0 fcadd z0\.d, p0/m, z0\.d, z31\.d, #90
+.*: 64c083e0 fcadd z0\.d, p0/m, z0\.d, z31\.d, #90
+.*: 64c18000 fcadd z0\.d, p0/m, z0\.d, z0\.d, #270
+.*: 64c18000 fcadd z0\.d, p0/m, z0\.d, z0\.d, #270
+.*: 64400000 fcmla z0\.h, p0/m, z0\.h, z0\.h, #0
+.*: 64400000 fcmla z0\.h, p0/m, z0\.h, z0\.h, #0
+.*: 64400001 fcmla z1\.h, p0/m, z0\.h, z0\.h, #0
+.*: 64400001 fcmla z1\.h, p0/m, z0\.h, z0\.h, #0
+.*: 6440001f fcmla z31\.h, p0/m, z0\.h, z0\.h, #0
+.*: 6440001f fcmla z31\.h, p0/m, z0\.h, z0\.h, #0
+.*: 64400800 fcmla z0\.h, p2/m, z0\.h, z0\.h, #0
+.*: 64400800 fcmla z0\.h, p2/m, z0\.h, z0\.h, #0
+.*: 64401c00 fcmla z0\.h, p7/m, z0\.h, z0\.h, #0
+.*: 64401c00 fcmla z0\.h, p7/m, z0\.h, z0\.h, #0
+.*: 64400060 fcmla z0\.h, p0/m, z3\.h, z0\.h, #0
+.*: 64400060 fcmla z0\.h, p0/m, z3\.h, z0\.h, #0
+.*: 644003e0 fcmla z0\.h, p0/m, z31\.h, z0\.h, #0
+.*: 644003e0 fcmla z0\.h, p0/m, z31\.h, z0\.h, #0
+.*: 64440000 fcmla z0\.h, p0/m, z0\.h, z4\.h, #0
+.*: 64440000 fcmla z0\.h, p0/m, z0\.h, z4\.h, #0
+.*: 645f0000 fcmla z0\.h, p0/m, z0\.h, z31\.h, #0
+.*: 645f0000 fcmla z0\.h, p0/m, z0\.h, z31\.h, #0
+.*: 64402000 fcmla z0\.h, p0/m, z0\.h, z0\.h, #90
+.*: 64402000 fcmla z0\.h, p0/m, z0\.h, z0\.h, #90
+.*: 64404000 fcmla z0\.h, p0/m, z0\.h, z0\.h, #180
+.*: 64404000 fcmla z0\.h, p0/m, z0\.h, z0\.h, #180
+.*: 64406000 fcmla z0\.h, p0/m, z0\.h, z0\.h, #270
+.*: 64406000 fcmla z0\.h, p0/m, z0\.h, z0\.h, #270
+.*: 64800000 fcmla z0\.s, p0/m, z0\.s, z0\.s, #0
+.*: 64800000 fcmla z0\.s, p0/m, z0\.s, z0\.s, #0
+.*: 64800001 fcmla z1\.s, p0/m, z0\.s, z0\.s, #0
+.*: 64800001 fcmla z1\.s, p0/m, z0\.s, z0\.s, #0
+.*: 6480001f fcmla z31\.s, p0/m, z0\.s, z0\.s, #0
+.*: 6480001f fcmla z31\.s, p0/m, z0\.s, z0\.s, #0
+.*: 64800800 fcmla z0\.s, p2/m, z0\.s, z0\.s, #0
+.*: 64800800 fcmla z0\.s, p2/m, z0\.s, z0\.s, #0
+.*: 64801c00 fcmla z0\.s, p7/m, z0\.s, z0\.s, #0
+.*: 64801c00 fcmla z0\.s, p7/m, z0\.s, z0\.s, #0
+.*: 64800060 fcmla z0\.s, p0/m, z3\.s, z0\.s, #0
+.*: 64800060 fcmla z0\.s, p0/m, z3\.s, z0\.s, #0
+.*: 648003e0 fcmla z0\.s, p0/m, z31\.s, z0\.s, #0
+.*: 648003e0 fcmla z0\.s, p0/m, z31\.s, z0\.s, #0
+.*: 64840000 fcmla z0\.s, p0/m, z0\.s, z4\.s, #0
+.*: 64840000 fcmla z0\.s, p0/m, z0\.s, z4\.s, #0
+.*: 649f0000 fcmla z0\.s, p0/m, z0\.s, z31\.s, #0
+.*: 649f0000 fcmla z0\.s, p0/m, z0\.s, z31\.s, #0
+.*: 64802000 fcmla z0\.s, p0/m, z0\.s, z0\.s, #90
+.*: 64802000 fcmla z0\.s, p0/m, z0\.s, z0\.s, #90
+.*: 64804000 fcmla z0\.s, p0/m, z0\.s, z0\.s, #180
+.*: 64804000 fcmla z0\.s, p0/m, z0\.s, z0\.s, #180
+.*: 64806000 fcmla z0\.s, p0/m, z0\.s, z0\.s, #270
+.*: 64806000 fcmla z0\.s, p0/m, z0\.s, z0\.s, #270
+.*: 64c00000 fcmla z0\.d, p0/m, z0\.d, z0\.d, #0
+.*: 64c00000 fcmla z0\.d, p0/m, z0\.d, z0\.d, #0
+.*: 64c00001 fcmla z1\.d, p0/m, z0\.d, z0\.d, #0
+.*: 64c00001 fcmla z1\.d, p0/m, z0\.d, z0\.d, #0
+.*: 64c0001f fcmla z31\.d, p0/m, z0\.d, z0\.d, #0
+.*: 64c0001f fcmla z31\.d, p0/m, z0\.d, z0\.d, #0
+.*: 64c00800 fcmla z0\.d, p2/m, z0\.d, z0\.d, #0
+.*: 64c00800 fcmla z0\.d, p2/m, z0\.d, z0\.d, #0
+.*: 64c01c00 fcmla z0\.d, p7/m, z0\.d, z0\.d, #0
+.*: 64c01c00 fcmla z0\.d, p7/m, z0\.d, z0\.d, #0
+.*: 64c00060 fcmla z0\.d, p0/m, z3\.d, z0\.d, #0
+.*: 64c00060 fcmla z0\.d, p0/m, z3\.d, z0\.d, #0
+.*: 64c003e0 fcmla z0\.d, p0/m, z31\.d, z0\.d, #0
+.*: 64c003e0 fcmla z0\.d, p0/m, z31\.d, z0\.d, #0
+.*: 64c40000 fcmla z0\.d, p0/m, z0\.d, z4\.d, #0
+.*: 64c40000 fcmla z0\.d, p0/m, z0\.d, z4\.d, #0
+.*: 64df0000 fcmla z0\.d, p0/m, z0\.d, z31\.d, #0
+.*: 64df0000 fcmla z0\.d, p0/m, z0\.d, z31\.d, #0
+.*: 64c02000 fcmla z0\.d, p0/m, z0\.d, z0\.d, #90
+.*: 64c02000 fcmla z0\.d, p0/m, z0\.d, z0\.d, #90
+.*: 64c04000 fcmla z0\.d, p0/m, z0\.d, z0\.d, #180
+.*: 64c04000 fcmla z0\.d, p0/m, z0\.d, z0\.d, #180
+.*: 64c06000 fcmla z0\.d, p0/m, z0\.d, z0\.d, #270
+.*: 64c06000 fcmla z0\.d, p0/m, z0\.d, z0\.d, #270
+.*: 64a01000 fcmla z0\.h, z0\.h, z0\.h\[0\], #0
+.*: 64a01000 fcmla z0\.h, z0\.h, z0\.h\[0\], #0
+.*: 64a01001 fcmla z1\.h, z0\.h, z0\.h\[0\], #0
+.*: 64a01001 fcmla z1\.h, z0\.h, z0\.h\[0\], #0
+.*: 64a0101f fcmla z31\.h, z0\.h, z0\.h\[0\], #0
+.*: 64a0101f fcmla z31\.h, z0\.h, z0\.h\[0\], #0
+.*: 64a01040 fcmla z0\.h, z2\.h, z0\.h\[0\], #0
+.*: 64a01040 fcmla z0\.h, z2\.h, z0\.h\[0\], #0
+.*: 64a013e0 fcmla z0\.h, z31\.h, z0\.h\[0\], #0
+.*: 64a013e0 fcmla z0\.h, z31\.h, z0\.h\[0\], #0
+.*: 64a31000 fcmla z0\.h, z0\.h, z3\.h\[0\], #0
+.*: 64a31000 fcmla z0\.h, z0\.h, z3\.h\[0\], #0
+.*: 64a71000 fcmla z0\.h, z0\.h, z7\.h\[0\], #0
+.*: 64a71000 fcmla z0\.h, z0\.h, z7\.h\[0\], #0
+.*: 64a81000 fcmla z0\.h, z0\.h, z0\.h\[1\], #0
+.*: 64a81000 fcmla z0\.h, z0\.h, z0\.h\[1\], #0
+.*: 64ad1000 fcmla z0\.h, z0\.h, z5\.h\[1\], #0
+.*: 64ad1000 fcmla z0\.h, z0\.h, z5\.h\[1\], #0
+.*: 64b01000 fcmla z0\.h, z0\.h, z0\.h\[2\], #0
+.*: 64b01000 fcmla z0\.h, z0\.h, z0\.h\[2\], #0
+.*: 64b31000 fcmla z0\.h, z0\.h, z3\.h\[2\], #0
+.*: 64b31000 fcmla z0\.h, z0\.h, z3\.h\[2\], #0
+.*: 64b81000 fcmla z0\.h, z0\.h, z0\.h\[3\], #0
+.*: 64b81000 fcmla z0\.h, z0\.h, z0\.h\[3\], #0
+.*: 64be1000 fcmla z0\.h, z0\.h, z6\.h\[3\], #0
+.*: 64be1000 fcmla z0\.h, z0\.h, z6\.h\[3\], #0
+.*: 64a01400 fcmla z0\.h, z0\.h, z0\.h\[0\], #90
+.*: 64a01400 fcmla z0\.h, z0\.h, z0\.h\[0\], #90
+.*: 64a01800 fcmla z0\.h, z0\.h, z0\.h\[0\], #180
+.*: 64a01800 fcmla z0\.h, z0\.h, z0\.h\[0\], #180
+.*: 64a01c00 fcmla z0\.h, z0\.h, z0\.h\[0\], #270
+.*: 64a01c00 fcmla z0\.h, z0\.h, z0\.h\[0\], #270
+.*: 64e01000 fcmla z0\.s, z0\.s, z0\.s\[0\], #0
+.*: 64e01000 fcmla z0\.s, z0\.s, z0\.s\[0\], #0
+.*: 64e01001 fcmla z1\.s, z0\.s, z0\.s\[0\], #0
+.*: 64e01001 fcmla z1\.s, z0\.s, z0\.s\[0\], #0
+.*: 64e0101f fcmla z31\.s, z0\.s, z0\.s\[0\], #0
+.*: 64e0101f fcmla z31\.s, z0\.s, z0\.s\[0\], #0
+.*: 64e01040 fcmla z0\.s, z2\.s, z0\.s\[0\], #0
+.*: 64e01040 fcmla z0\.s, z2\.s, z0\.s\[0\], #0
+.*: 64e013e0 fcmla z0\.s, z31\.s, z0\.s\[0\], #0
+.*: 64e013e0 fcmla z0\.s, z31\.s, z0\.s\[0\], #0
+.*: 64e31000 fcmla z0\.s, z0\.s, z3\.s\[0\], #0
+.*: 64e31000 fcmla z0\.s, z0\.s, z3\.s\[0\], #0
+.*: 64ef1000 fcmla z0\.s, z0\.s, z15\.s\[0\], #0
+.*: 64ef1000 fcmla z0\.s, z0\.s, z15\.s\[0\], #0
+.*: 64f01000 fcmla z0\.s, z0\.s, z0\.s\[1\], #0
+.*: 64f01000 fcmla z0\.s, z0\.s, z0\.s\[1\], #0
+.*: 64fb1000 fcmla z0\.s, z0\.s, z11\.s\[1\], #0
+.*: 64fb1000 fcmla z0\.s, z0\.s, z11\.s\[1\], #0
+.*: 64e01400 fcmla z0\.s, z0\.s, z0\.s\[0\], #90
+.*: 64e01400 fcmla z0\.s, z0\.s, z0\.s\[0\], #90
+.*: 64e01800 fcmla z0\.s, z0\.s, z0\.s\[0\], #180
+.*: 64e01800 fcmla z0\.s, z0\.s, z0\.s\[0\], #180
+.*: 64e01c00 fcmla z0\.s, z0\.s, z0\.s\[0\], #270
+.*: 64e01c00 fcmla z0\.s, z0\.s, z0\.s\[0\], #270
+.*: 65522000 fcmeq p0\.h, p0/z, z0\.h, #0\.0
+.*: 65522000 fcmeq p0\.h, p0/z, z0\.h, #0\.0
+.*: 65522001 fcmeq p1\.h, p0/z, z0\.h, #0\.0
+.*: 65522001 fcmeq p1\.h, p0/z, z0\.h, #0\.0
+.*: 6552200f fcmeq p15\.h, p0/z, z0\.h, #0\.0
+.*: 6552200f fcmeq p15\.h, p0/z, z0\.h, #0\.0
+.*: 65522800 fcmeq p0\.h, p2/z, z0\.h, #0\.0
+.*: 65522800 fcmeq p0\.h, p2/z, z0\.h, #0\.0
+.*: 65523c00 fcmeq p0\.h, p7/z, z0\.h, #0\.0
+.*: 65523c00 fcmeq p0\.h, p7/z, z0\.h, #0\.0
+.*: 65522060 fcmeq p0\.h, p0/z, z3\.h, #0\.0
+.*: 65522060 fcmeq p0\.h, p0/z, z3\.h, #0\.0
+.*: 655223e0 fcmeq p0\.h, p0/z, z31\.h, #0\.0
+.*: 655223e0 fcmeq p0\.h, p0/z, z31\.h, #0\.0
.*: 65922000 fcmeq p0\.s, p0/z, z0\.s, #0\.0
.*: 65922000 fcmeq p0\.s, p0/z, z0\.s, #0\.0
.*: 65922001 fcmeq p1\.s, p0/z, z0\.s, #0\.0
@@ -8428,6 +8860,24 @@ Disassembly of section .*:
.*: 65d22060 fcmeq p0\.d, p0/z, z3\.d, #0\.0
.*: 65d223e0 fcmeq p0\.d, p0/z, z31\.d, #0\.0
.*: 65d223e0 fcmeq p0\.d, p0/z, z31\.d, #0\.0
+.*: 65406000 fcmeq p0\.h, p0/z, z0\.h, z0\.h
+.*: 65406000 fcmeq p0\.h, p0/z, z0\.h, z0\.h
+.*: 65406001 fcmeq p1\.h, p0/z, z0\.h, z0\.h
+.*: 65406001 fcmeq p1\.h, p0/z, z0\.h, z0\.h
+.*: 6540600f fcmeq p15\.h, p0/z, z0\.h, z0\.h
+.*: 6540600f fcmeq p15\.h, p0/z, z0\.h, z0\.h
+.*: 65406800 fcmeq p0\.h, p2/z, z0\.h, z0\.h
+.*: 65406800 fcmeq p0\.h, p2/z, z0\.h, z0\.h
+.*: 65407c00 fcmeq p0\.h, p7/z, z0\.h, z0\.h
+.*: 65407c00 fcmeq p0\.h, p7/z, z0\.h, z0\.h
+.*: 65406060 fcmeq p0\.h, p0/z, z3\.h, z0\.h
+.*: 65406060 fcmeq p0\.h, p0/z, z3\.h, z0\.h
+.*: 654063e0 fcmeq p0\.h, p0/z, z31\.h, z0\.h
+.*: 654063e0 fcmeq p0\.h, p0/z, z31\.h, z0\.h
+.*: 65446000 fcmeq p0\.h, p0/z, z0\.h, z4\.h
+.*: 65446000 fcmeq p0\.h, p0/z, z0\.h, z4\.h
+.*: 655f6000 fcmeq p0\.h, p0/z, z0\.h, z31\.h
+.*: 655f6000 fcmeq p0\.h, p0/z, z0\.h, z31\.h
.*: 65806000 fcmeq p0\.s, p0/z, z0\.s, z0\.s
.*: 65806000 fcmeq p0\.s, p0/z, z0\.s, z0\.s
.*: 65806001 fcmeq p1\.s, p0/z, z0\.s, z0\.s
@@ -8464,6 +8914,20 @@ Disassembly of section .*:
.*: 65c46000 fcmeq p0\.d, p0/z, z0\.d, z4\.d
.*: 65df6000 fcmeq p0\.d, p0/z, z0\.d, z31\.d
.*: 65df6000 fcmeq p0\.d, p0/z, z0\.d, z31\.d
+.*: 65502000 fcmge p0\.h, p0/z, z0\.h, #0\.0
+.*: 65502000 fcmge p0\.h, p0/z, z0\.h, #0\.0
+.*: 65502001 fcmge p1\.h, p0/z, z0\.h, #0\.0
+.*: 65502001 fcmge p1\.h, p0/z, z0\.h, #0\.0
+.*: 6550200f fcmge p15\.h, p0/z, z0\.h, #0\.0
+.*: 6550200f fcmge p15\.h, p0/z, z0\.h, #0\.0
+.*: 65502800 fcmge p0\.h, p2/z, z0\.h, #0\.0
+.*: 65502800 fcmge p0\.h, p2/z, z0\.h, #0\.0
+.*: 65503c00 fcmge p0\.h, p7/z, z0\.h, #0\.0
+.*: 65503c00 fcmge p0\.h, p7/z, z0\.h, #0\.0
+.*: 65502060 fcmge p0\.h, p0/z, z3\.h, #0\.0
+.*: 65502060 fcmge p0\.h, p0/z, z3\.h, #0\.0
+.*: 655023e0 fcmge p0\.h, p0/z, z31\.h, #0\.0
+.*: 655023e0 fcmge p0\.h, p0/z, z31\.h, #0\.0
.*: 65902000 fcmge p0\.s, p0/z, z0\.s, #0\.0
.*: 65902000 fcmge p0\.s, p0/z, z0\.s, #0\.0
.*: 65902001 fcmge p1\.s, p0/z, z0\.s, #0\.0
@@ -8492,6 +8956,24 @@ Disassembly of section .*:
.*: 65d02060 fcmge p0\.d, p0/z, z3\.d, #0\.0
.*: 65d023e0 fcmge p0\.d, p0/z, z31\.d, #0\.0
.*: 65d023e0 fcmge p0\.d, p0/z, z31\.d, #0\.0
+.*: 65404000 fcmge p0\.h, p0/z, z0\.h, z0\.h
+.*: 65404000 fcmge p0\.h, p0/z, z0\.h, z0\.h
+.*: 65404001 fcmge p1\.h, p0/z, z0\.h, z0\.h
+.*: 65404001 fcmge p1\.h, p0/z, z0\.h, z0\.h
+.*: 6540400f fcmge p15\.h, p0/z, z0\.h, z0\.h
+.*: 6540400f fcmge p15\.h, p0/z, z0\.h, z0\.h
+.*: 65404800 fcmge p0\.h, p2/z, z0\.h, z0\.h
+.*: 65404800 fcmge p0\.h, p2/z, z0\.h, z0\.h
+.*: 65405c00 fcmge p0\.h, p7/z, z0\.h, z0\.h
+.*: 65405c00 fcmge p0\.h, p7/z, z0\.h, z0\.h
+.*: 65404060 fcmge p0\.h, p0/z, z3\.h, z0\.h
+.*: 65404060 fcmge p0\.h, p0/z, z3\.h, z0\.h
+.*: 654043e0 fcmge p0\.h, p0/z, z31\.h, z0\.h
+.*: 654043e0 fcmge p0\.h, p0/z, z31\.h, z0\.h
+.*: 65444000 fcmge p0\.h, p0/z, z0\.h, z4\.h
+.*: 65444000 fcmge p0\.h, p0/z, z0\.h, z4\.h
+.*: 655f4000 fcmge p0\.h, p0/z, z0\.h, z31\.h
+.*: 655f4000 fcmge p0\.h, p0/z, z0\.h, z31\.h
.*: 65804000 fcmge p0\.s, p0/z, z0\.s, z0\.s
.*: 65804000 fcmge p0\.s, p0/z, z0\.s, z0\.s
.*: 65804001 fcmge p1\.s, p0/z, z0\.s, z0\.s
@@ -8528,6 +9010,20 @@ Disassembly of section .*:
.*: 65c44000 fcmge p0\.d, p0/z, z0\.d, z4\.d
.*: 65df4000 fcmge p0\.d, p0/z, z0\.d, z31\.d
.*: 65df4000 fcmge p0\.d, p0/z, z0\.d, z31\.d
+.*: 65502010 fcmgt p0\.h, p0/z, z0\.h, #0\.0
+.*: 65502010 fcmgt p0\.h, p0/z, z0\.h, #0\.0
+.*: 65502011 fcmgt p1\.h, p0/z, z0\.h, #0\.0
+.*: 65502011 fcmgt p1\.h, p0/z, z0\.h, #0\.0
+.*: 6550201f fcmgt p15\.h, p0/z, z0\.h, #0\.0
+.*: 6550201f fcmgt p15\.h, p0/z, z0\.h, #0\.0
+.*: 65502810 fcmgt p0\.h, p2/z, z0\.h, #0\.0
+.*: 65502810 fcmgt p0\.h, p2/z, z0\.h, #0\.0
+.*: 65503c10 fcmgt p0\.h, p7/z, z0\.h, #0\.0
+.*: 65503c10 fcmgt p0\.h, p7/z, z0\.h, #0\.0
+.*: 65502070 fcmgt p0\.h, p0/z, z3\.h, #0\.0
+.*: 65502070 fcmgt p0\.h, p0/z, z3\.h, #0\.0
+.*: 655023f0 fcmgt p0\.h, p0/z, z31\.h, #0\.0
+.*: 655023f0 fcmgt p0\.h, p0/z, z31\.h, #0\.0
.*: 65902010 fcmgt p0\.s, p0/z, z0\.s, #0\.0
.*: 65902010 fcmgt p0\.s, p0/z, z0\.s, #0\.0
.*: 65902011 fcmgt p1\.s, p0/z, z0\.s, #0\.0
@@ -8556,6 +9052,24 @@ Disassembly of section .*:
.*: 65d02070 fcmgt p0\.d, p0/z, z3\.d, #0\.0
.*: 65d023f0 fcmgt p0\.d, p0/z, z31\.d, #0\.0
.*: 65d023f0 fcmgt p0\.d, p0/z, z31\.d, #0\.0
+.*: 65404010 fcmgt p0\.h, p0/z, z0\.h, z0\.h
+.*: 65404010 fcmgt p0\.h, p0/z, z0\.h, z0\.h
+.*: 65404011 fcmgt p1\.h, p0/z, z0\.h, z0\.h
+.*: 65404011 fcmgt p1\.h, p0/z, z0\.h, z0\.h
+.*: 6540401f fcmgt p15\.h, p0/z, z0\.h, z0\.h
+.*: 6540401f fcmgt p15\.h, p0/z, z0\.h, z0\.h
+.*: 65404810 fcmgt p0\.h, p2/z, z0\.h, z0\.h
+.*: 65404810 fcmgt p0\.h, p2/z, z0\.h, z0\.h
+.*: 65405c10 fcmgt p0\.h, p7/z, z0\.h, z0\.h
+.*: 65405c10 fcmgt p0\.h, p7/z, z0\.h, z0\.h
+.*: 65404070 fcmgt p0\.h, p0/z, z3\.h, z0\.h
+.*: 65404070 fcmgt p0\.h, p0/z, z3\.h, z0\.h
+.*: 654043f0 fcmgt p0\.h, p0/z, z31\.h, z0\.h
+.*: 654043f0 fcmgt p0\.h, p0/z, z31\.h, z0\.h
+.*: 65444010 fcmgt p0\.h, p0/z, z0\.h, z4\.h
+.*: 65444010 fcmgt p0\.h, p0/z, z0\.h, z4\.h
+.*: 655f4010 fcmgt p0\.h, p0/z, z0\.h, z31\.h
+.*: 655f4010 fcmgt p0\.h, p0/z, z0\.h, z31\.h
.*: 65804010 fcmgt p0\.s, p0/z, z0\.s, z0\.s
.*: 65804010 fcmgt p0\.s, p0/z, z0\.s, z0\.s
.*: 65804011 fcmgt p1\.s, p0/z, z0\.s, z0\.s
@@ -8592,6 +9106,20 @@ Disassembly of section .*:
.*: 65c44010 fcmgt p0\.d, p0/z, z0\.d, z4\.d
.*: 65df4010 fcmgt p0\.d, p0/z, z0\.d, z31\.d
.*: 65df4010 fcmgt p0\.d, p0/z, z0\.d, z31\.d
+.*: 65512010 fcmle p0\.h, p0/z, z0\.h, #0\.0
+.*: 65512010 fcmle p0\.h, p0/z, z0\.h, #0\.0
+.*: 65512011 fcmle p1\.h, p0/z, z0\.h, #0\.0
+.*: 65512011 fcmle p1\.h, p0/z, z0\.h, #0\.0
+.*: 6551201f fcmle p15\.h, p0/z, z0\.h, #0\.0
+.*: 6551201f fcmle p15\.h, p0/z, z0\.h, #0\.0
+.*: 65512810 fcmle p0\.h, p2/z, z0\.h, #0\.0
+.*: 65512810 fcmle p0\.h, p2/z, z0\.h, #0\.0
+.*: 65513c10 fcmle p0\.h, p7/z, z0\.h, #0\.0
+.*: 65513c10 fcmle p0\.h, p7/z, z0\.h, #0\.0
+.*: 65512070 fcmle p0\.h, p0/z, z3\.h, #0\.0
+.*: 65512070 fcmle p0\.h, p0/z, z3\.h, #0\.0
+.*: 655123f0 fcmle p0\.h, p0/z, z31\.h, #0\.0
+.*: 655123f0 fcmle p0\.h, p0/z, z31\.h, #0\.0
.*: 65912010 fcmle p0\.s, p0/z, z0\.s, #0\.0
.*: 65912010 fcmle p0\.s, p0/z, z0\.s, #0\.0
.*: 65912011 fcmle p1\.s, p0/z, z0\.s, #0\.0
@@ -8620,6 +9148,20 @@ Disassembly of section .*:
.*: 65d12070 fcmle p0\.d, p0/z, z3\.d, #0\.0
.*: 65d123f0 fcmle p0\.d, p0/z, z31\.d, #0\.0
.*: 65d123f0 fcmle p0\.d, p0/z, z31\.d, #0\.0
+.*: 65512000 fcmlt p0\.h, p0/z, z0\.h, #0\.0
+.*: 65512000 fcmlt p0\.h, p0/z, z0\.h, #0\.0
+.*: 65512001 fcmlt p1\.h, p0/z, z0\.h, #0\.0
+.*: 65512001 fcmlt p1\.h, p0/z, z0\.h, #0\.0
+.*: 6551200f fcmlt p15\.h, p0/z, z0\.h, #0\.0
+.*: 6551200f fcmlt p15\.h, p0/z, z0\.h, #0\.0
+.*: 65512800 fcmlt p0\.h, p2/z, z0\.h, #0\.0
+.*: 65512800 fcmlt p0\.h, p2/z, z0\.h, #0\.0
+.*: 65513c00 fcmlt p0\.h, p7/z, z0\.h, #0\.0
+.*: 65513c00 fcmlt p0\.h, p7/z, z0\.h, #0\.0
+.*: 65512060 fcmlt p0\.h, p0/z, z3\.h, #0\.0
+.*: 65512060 fcmlt p0\.h, p0/z, z3\.h, #0\.0
+.*: 655123e0 fcmlt p0\.h, p0/z, z31\.h, #0\.0
+.*: 655123e0 fcmlt p0\.h, p0/z, z31\.h, #0\.0
.*: 65912000 fcmlt p0\.s, p0/z, z0\.s, #0\.0
.*: 65912000 fcmlt p0\.s, p0/z, z0\.s, #0\.0
.*: 65912001 fcmlt p1\.s, p0/z, z0\.s, #0\.0
@@ -8648,6 +9190,20 @@ Disassembly of section .*:
.*: 65d12060 fcmlt p0\.d, p0/z, z3\.d, #0\.0
.*: 65d123e0 fcmlt p0\.d, p0/z, z31\.d, #0\.0
.*: 65d123e0 fcmlt p0\.d, p0/z, z31\.d, #0\.0
+.*: 65532000 fcmne p0\.h, p0/z, z0\.h, #0\.0
+.*: 65532000 fcmne p0\.h, p0/z, z0\.h, #0\.0
+.*: 65532001 fcmne p1\.h, p0/z, z0\.h, #0\.0
+.*: 65532001 fcmne p1\.h, p0/z, z0\.h, #0\.0
+.*: 6553200f fcmne p15\.h, p0/z, z0\.h, #0\.0
+.*: 6553200f fcmne p15\.h, p0/z, z0\.h, #0\.0
+.*: 65532800 fcmne p0\.h, p2/z, z0\.h, #0\.0
+.*: 65532800 fcmne p0\.h, p2/z, z0\.h, #0\.0
+.*: 65533c00 fcmne p0\.h, p7/z, z0\.h, #0\.0
+.*: 65533c00 fcmne p0\.h, p7/z, z0\.h, #0\.0
+.*: 65532060 fcmne p0\.h, p0/z, z3\.h, #0\.0
+.*: 65532060 fcmne p0\.h, p0/z, z3\.h, #0\.0
+.*: 655323e0 fcmne p0\.h, p0/z, z31\.h, #0\.0
+.*: 655323e0 fcmne p0\.h, p0/z, z31\.h, #0\.0
.*: 65932000 fcmne p0\.s, p0/z, z0\.s, #0\.0
.*: 65932000 fcmne p0\.s, p0/z, z0\.s, #0\.0
.*: 65932001 fcmne p1\.s, p0/z, z0\.s, #0\.0
@@ -8676,6 +9232,24 @@ Disassembly of section .*:
.*: 65d32060 fcmne p0\.d, p0/z, z3\.d, #0\.0
.*: 65d323e0 fcmne p0\.d, p0/z, z31\.d, #0\.0
.*: 65d323e0 fcmne p0\.d, p0/z, z31\.d, #0\.0
+.*: 65406010 fcmne p0\.h, p0/z, z0\.h, z0\.h
+.*: 65406010 fcmne p0\.h, p0/z, z0\.h, z0\.h
+.*: 65406011 fcmne p1\.h, p0/z, z0\.h, z0\.h
+.*: 65406011 fcmne p1\.h, p0/z, z0\.h, z0\.h
+.*: 6540601f fcmne p15\.h, p0/z, z0\.h, z0\.h
+.*: 6540601f fcmne p15\.h, p0/z, z0\.h, z0\.h
+.*: 65406810 fcmne p0\.h, p2/z, z0\.h, z0\.h
+.*: 65406810 fcmne p0\.h, p2/z, z0\.h, z0\.h
+.*: 65407c10 fcmne p0\.h, p7/z, z0\.h, z0\.h
+.*: 65407c10 fcmne p0\.h, p7/z, z0\.h, z0\.h
+.*: 65406070 fcmne p0\.h, p0/z, z3\.h, z0\.h
+.*: 65406070 fcmne p0\.h, p0/z, z3\.h, z0\.h
+.*: 654063f0 fcmne p0\.h, p0/z, z31\.h, z0\.h
+.*: 654063f0 fcmne p0\.h, p0/z, z31\.h, z0\.h
+.*: 65446010 fcmne p0\.h, p0/z, z0\.h, z4\.h
+.*: 65446010 fcmne p0\.h, p0/z, z0\.h, z4\.h
+.*: 655f6010 fcmne p0\.h, p0/z, z0\.h, z31\.h
+.*: 655f6010 fcmne p0\.h, p0/z, z0\.h, z31\.h
.*: 65806010 fcmne p0\.s, p0/z, z0\.s, z0\.s
.*: 65806010 fcmne p0\.s, p0/z, z0\.s, z0\.s
.*: 65806011 fcmne p1\.s, p0/z, z0\.s, z0\.s
@@ -8712,6 +9286,24 @@ Disassembly of section .*:
.*: 65c46010 fcmne p0\.d, p0/z, z0\.d, z4\.d
.*: 65df6010 fcmne p0\.d, p0/z, z0\.d, z31\.d
.*: 65df6010 fcmne p0\.d, p0/z, z0\.d, z31\.d
+.*: 6540c000 fcmuo p0\.h, p0/z, z0\.h, z0\.h
+.*: 6540c000 fcmuo p0\.h, p0/z, z0\.h, z0\.h
+.*: 6540c001 fcmuo p1\.h, p0/z, z0\.h, z0\.h
+.*: 6540c001 fcmuo p1\.h, p0/z, z0\.h, z0\.h
+.*: 6540c00f fcmuo p15\.h, p0/z, z0\.h, z0\.h
+.*: 6540c00f fcmuo p15\.h, p0/z, z0\.h, z0\.h
+.*: 6540c800 fcmuo p0\.h, p2/z, z0\.h, z0\.h
+.*: 6540c800 fcmuo p0\.h, p2/z, z0\.h, z0\.h
+.*: 6540dc00 fcmuo p0\.h, p7/z, z0\.h, z0\.h
+.*: 6540dc00 fcmuo p0\.h, p7/z, z0\.h, z0\.h
+.*: 6540c060 fcmuo p0\.h, p0/z, z3\.h, z0\.h
+.*: 6540c060 fcmuo p0\.h, p0/z, z3\.h, z0\.h
+.*: 6540c3e0 fcmuo p0\.h, p0/z, z31\.h, z0\.h
+.*: 6540c3e0 fcmuo p0\.h, p0/z, z31\.h, z0\.h
+.*: 6544c000 fcmuo p0\.h, p0/z, z0\.h, z4\.h
+.*: 6544c000 fcmuo p0\.h, p0/z, z0\.h, z4\.h
+.*: 655fc000 fcmuo p0\.h, p0/z, z0\.h, z31\.h
+.*: 655fc000 fcmuo p0\.h, p0/z, z0\.h, z31\.h
.*: 6580c000 fcmuo p0\.s, p0/z, z0\.s, z0\.s
.*: 6580c000 fcmuo p0\.s, p0/z, z0\.s, z0\.s
.*: 6580c001 fcmuo p1\.s, p0/z, z0\.s, z0\.s
@@ -8748,6 +9340,28 @@ Disassembly of section .*:
.*: 65c4c000 fcmuo p0\.d, p0/z, z0\.d, z4\.d
.*: 65dfc000 fcmuo p0\.d, p0/z, z0\.d, z31\.d
.*: 65dfc000 fcmuo p0\.d, p0/z, z0\.d, z31\.d
+.*: 0550c000 fmov z0\.h, p0/m, #2\.0+e\+00
+.*: 0550c000 fmov z0\.h, p0/m, #2\.0+e\+00
+.*: 0550c001 fmov z1\.h, p0/m, #2\.0+e\+00
+.*: 0550c001 fmov z1\.h, p0/m, #2\.0+e\+00
+.*: 0550c01f fmov z31\.h, p0/m, #2\.0+e\+00
+.*: 0550c01f fmov z31\.h, p0/m, #2\.0+e\+00
+.*: 0552c000 fmov z0\.h, p2/m, #2\.0+e\+00
+.*: 0552c000 fmov z0\.h, p2/m, #2\.0+e\+00
+.*: 055fc000 fmov z0\.h, p15/m, #2\.0+e\+00
+.*: 055fc000 fmov z0\.h, p15/m, #2\.0+e\+00
+.*: 0550c600 fmov z0\.h, p0/m, #1\.60+e\+01
+.*: 0550c600 fmov z0\.h, p0/m, #1\.60+e\+01
+.*: 0550c900 fmov z0\.h, p0/m, #1\.8750+e-01
+.*: 0550c900 fmov z0\.h, p0/m, #1\.8750+e-01
+.*: 0550cfe0 fmov z0\.h, p0/m, #1\.93750+e\+00
+.*: 0550cfe0 fmov z0\.h, p0/m, #1\.93750+e\+00
+.*: 0550d100 fmov z0\.h, p0/m, #-3\.0+e\+00
+.*: 0550d100 fmov z0\.h, p0/m, #-3\.0+e\+00
+.*: 0550d800 fmov z0\.h, p0/m, #-1\.250+e-01
+.*: 0550d800 fmov z0\.h, p0/m, #-1\.250+e-01
+.*: 0550dfe0 fmov z0\.h, p0/m, #-1\.93750+e\+00
+.*: 0550dfe0 fmov z0\.h, p0/m, #-1\.93750+e\+00
.*: 0590c000 fmov z0\.s, p0/m, #2\.0+e\+00
.*: 0590c000 fmov z0\.s, p0/m, #2\.0+e\+00
.*: 0590c001 fmov z1\.s, p0/m, #2\.0+e\+00
@@ -8876,6 +9490,48 @@ Disassembly of section .*:
.*: 65cba060 fcvt z0\.d, p0/m, z3\.s
.*: 65cba3e0 fcvt z0\.d, p0/m, z31\.s
.*: 65cba3e0 fcvt z0\.d, p0/m, z31\.s
+.*: 655aa000 fcvtzs z0\.h, p0/m, z0\.h
+.*: 655aa000 fcvtzs z0\.h, p0/m, z0\.h
+.*: 655aa001 fcvtzs z1\.h, p0/m, z0\.h
+.*: 655aa001 fcvtzs z1\.h, p0/m, z0\.h
+.*: 655aa01f fcvtzs z31\.h, p0/m, z0\.h
+.*: 655aa01f fcvtzs z31\.h, p0/m, z0\.h
+.*: 655aa800 fcvtzs z0\.h, p2/m, z0\.h
+.*: 655aa800 fcvtzs z0\.h, p2/m, z0\.h
+.*: 655abc00 fcvtzs z0\.h, p7/m, z0\.h
+.*: 655abc00 fcvtzs z0\.h, p7/m, z0\.h
+.*: 655aa060 fcvtzs z0\.h, p0/m, z3\.h
+.*: 655aa060 fcvtzs z0\.h, p0/m, z3\.h
+.*: 655aa3e0 fcvtzs z0\.h, p0/m, z31\.h
+.*: 655aa3e0 fcvtzs z0\.h, p0/m, z31\.h
+.*: 655ca000 fcvtzs z0\.s, p0/m, z0\.h
+.*: 655ca000 fcvtzs z0\.s, p0/m, z0\.h
+.*: 655ca001 fcvtzs z1\.s, p0/m, z0\.h
+.*: 655ca001 fcvtzs z1\.s, p0/m, z0\.h
+.*: 655ca01f fcvtzs z31\.s, p0/m, z0\.h
+.*: 655ca01f fcvtzs z31\.s, p0/m, z0\.h
+.*: 655ca800 fcvtzs z0\.s, p2/m, z0\.h
+.*: 655ca800 fcvtzs z0\.s, p2/m, z0\.h
+.*: 655cbc00 fcvtzs z0\.s, p7/m, z0\.h
+.*: 655cbc00 fcvtzs z0\.s, p7/m, z0\.h
+.*: 655ca060 fcvtzs z0\.s, p0/m, z3\.h
+.*: 655ca060 fcvtzs z0\.s, p0/m, z3\.h
+.*: 655ca3e0 fcvtzs z0\.s, p0/m, z31\.h
+.*: 655ca3e0 fcvtzs z0\.s, p0/m, z31\.h
+.*: 655ea000 fcvtzs z0\.d, p0/m, z0\.h
+.*: 655ea000 fcvtzs z0\.d, p0/m, z0\.h
+.*: 655ea001 fcvtzs z1\.d, p0/m, z0\.h
+.*: 655ea001 fcvtzs z1\.d, p0/m, z0\.h
+.*: 655ea01f fcvtzs z31\.d, p0/m, z0\.h
+.*: 655ea01f fcvtzs z31\.d, p0/m, z0\.h
+.*: 655ea800 fcvtzs z0\.d, p2/m, z0\.h
+.*: 655ea800 fcvtzs z0\.d, p2/m, z0\.h
+.*: 655ebc00 fcvtzs z0\.d, p7/m, z0\.h
+.*: 655ebc00 fcvtzs z0\.d, p7/m, z0\.h
+.*: 655ea060 fcvtzs z0\.d, p0/m, z3\.h
+.*: 655ea060 fcvtzs z0\.d, p0/m, z3\.h
+.*: 655ea3e0 fcvtzs z0\.d, p0/m, z31\.h
+.*: 655ea3e0 fcvtzs z0\.d, p0/m, z31\.h
.*: 659ca000 fcvtzs z0\.s, p0/m, z0\.s
.*: 659ca000 fcvtzs z0\.s, p0/m, z0\.s
.*: 659ca001 fcvtzs z1\.s, p0/m, z0\.s
@@ -8932,6 +9588,48 @@ Disassembly of section .*:
.*: 65dea060 fcvtzs z0\.d, p0/m, z3\.d
.*: 65dea3e0 fcvtzs z0\.d, p0/m, z31\.d
.*: 65dea3e0 fcvtzs z0\.d, p0/m, z31\.d
+.*: 655ba000 fcvtzu z0\.h, p0/m, z0\.h
+.*: 655ba000 fcvtzu z0\.h, p0/m, z0\.h
+.*: 655ba001 fcvtzu z1\.h, p0/m, z0\.h
+.*: 655ba001 fcvtzu z1\.h, p0/m, z0\.h
+.*: 655ba01f fcvtzu z31\.h, p0/m, z0\.h
+.*: 655ba01f fcvtzu z31\.h, p0/m, z0\.h
+.*: 655ba800 fcvtzu z0\.h, p2/m, z0\.h
+.*: 655ba800 fcvtzu z0\.h, p2/m, z0\.h
+.*: 655bbc00 fcvtzu z0\.h, p7/m, z0\.h
+.*: 655bbc00 fcvtzu z0\.h, p7/m, z0\.h
+.*: 655ba060 fcvtzu z0\.h, p0/m, z3\.h
+.*: 655ba060 fcvtzu z0\.h, p0/m, z3\.h
+.*: 655ba3e0 fcvtzu z0\.h, p0/m, z31\.h
+.*: 655ba3e0 fcvtzu z0\.h, p0/m, z31\.h
+.*: 655da000 fcvtzu z0\.s, p0/m, z0\.h
+.*: 655da000 fcvtzu z0\.s, p0/m, z0\.h
+.*: 655da001 fcvtzu z1\.s, p0/m, z0\.h
+.*: 655da001 fcvtzu z1\.s, p0/m, z0\.h
+.*: 655da01f fcvtzu z31\.s, p0/m, z0\.h
+.*: 655da01f fcvtzu z31\.s, p0/m, z0\.h
+.*: 655da800 fcvtzu z0\.s, p2/m, z0\.h
+.*: 655da800 fcvtzu z0\.s, p2/m, z0\.h
+.*: 655dbc00 fcvtzu z0\.s, p7/m, z0\.h
+.*: 655dbc00 fcvtzu z0\.s, p7/m, z0\.h
+.*: 655da060 fcvtzu z0\.s, p0/m, z3\.h
+.*: 655da060 fcvtzu z0\.s, p0/m, z3\.h
+.*: 655da3e0 fcvtzu z0\.s, p0/m, z31\.h
+.*: 655da3e0 fcvtzu z0\.s, p0/m, z31\.h
+.*: 655fa000 fcvtzu z0\.d, p0/m, z0\.h
+.*: 655fa000 fcvtzu z0\.d, p0/m, z0\.h
+.*: 655fa001 fcvtzu z1\.d, p0/m, z0\.h
+.*: 655fa001 fcvtzu z1\.d, p0/m, z0\.h
+.*: 655fa01f fcvtzu z31\.d, p0/m, z0\.h
+.*: 655fa01f fcvtzu z31\.d, p0/m, z0\.h
+.*: 655fa800 fcvtzu z0\.d, p2/m, z0\.h
+.*: 655fa800 fcvtzu z0\.d, p2/m, z0\.h
+.*: 655fbc00 fcvtzu z0\.d, p7/m, z0\.h
+.*: 655fbc00 fcvtzu z0\.d, p7/m, z0\.h
+.*: 655fa060 fcvtzu z0\.d, p0/m, z3\.h
+.*: 655fa060 fcvtzu z0\.d, p0/m, z3\.h
+.*: 655fa3e0 fcvtzu z0\.d, p0/m, z31\.h
+.*: 655fa3e0 fcvtzu z0\.d, p0/m, z31\.h
.*: 659da000 fcvtzu z0\.s, p0/m, z0\.s
.*: 659da000 fcvtzu z0\.s, p0/m, z0\.s
.*: 659da001 fcvtzu z1\.s, p0/m, z0\.s
@@ -8988,6 +9686,22 @@ Disassembly of section .*:
.*: 65dfa060 fcvtzu z0\.d, p0/m, z3\.d
.*: 65dfa3e0 fcvtzu z0\.d, p0/m, z31\.d
.*: 65dfa3e0 fcvtzu z0\.d, p0/m, z31\.d
+.*: 654d8000 fdiv z0\.h, p0/m, z0\.h, z0\.h
+.*: 654d8000 fdiv z0\.h, p0/m, z0\.h, z0\.h
+.*: 654d8001 fdiv z1\.h, p0/m, z1\.h, z0\.h
+.*: 654d8001 fdiv z1\.h, p0/m, z1\.h, z0\.h
+.*: 654d801f fdiv z31\.h, p0/m, z31\.h, z0\.h
+.*: 654d801f fdiv z31\.h, p0/m, z31\.h, z0\.h
+.*: 654d8800 fdiv z0\.h, p2/m, z0\.h, z0\.h
+.*: 654d8800 fdiv z0\.h, p2/m, z0\.h, z0\.h
+.*: 654d9c00 fdiv z0\.h, p7/m, z0\.h, z0\.h
+.*: 654d9c00 fdiv z0\.h, p7/m, z0\.h, z0\.h
+.*: 654d8003 fdiv z3\.h, p0/m, z3\.h, z0\.h
+.*: 654d8003 fdiv z3\.h, p0/m, z3\.h, z0\.h
+.*: 654d8080 fdiv z0\.h, p0/m, z0\.h, z4\.h
+.*: 654d8080 fdiv z0\.h, p0/m, z0\.h, z4\.h
+.*: 654d83e0 fdiv z0\.h, p0/m, z0\.h, z31\.h
+.*: 654d83e0 fdiv z0\.h, p0/m, z0\.h, z31\.h
.*: 658d8000 fdiv z0\.s, p0/m, z0\.s, z0\.s
.*: 658d8000 fdiv z0\.s, p0/m, z0\.s, z0\.s
.*: 658d8001 fdiv z1\.s, p0/m, z1\.s, z0\.s
@@ -9020,6 +9734,22 @@ Disassembly of section .*:
.*: 65cd8080 fdiv z0\.d, p0/m, z0\.d, z4\.d
.*: 65cd83e0 fdiv z0\.d, p0/m, z0\.d, z31\.d
.*: 65cd83e0 fdiv z0\.d, p0/m, z0\.d, z31\.d
+.*: 654c8000 fdivr z0\.h, p0/m, z0\.h, z0\.h
+.*: 654c8000 fdivr z0\.h, p0/m, z0\.h, z0\.h
+.*: 654c8001 fdivr z1\.h, p0/m, z1\.h, z0\.h
+.*: 654c8001 fdivr z1\.h, p0/m, z1\.h, z0\.h
+.*: 654c801f fdivr z31\.h, p0/m, z31\.h, z0\.h
+.*: 654c801f fdivr z31\.h, p0/m, z31\.h, z0\.h
+.*: 654c8800 fdivr z0\.h, p2/m, z0\.h, z0\.h
+.*: 654c8800 fdivr z0\.h, p2/m, z0\.h, z0\.h
+.*: 654c9c00 fdivr z0\.h, p7/m, z0\.h, z0\.h
+.*: 654c9c00 fdivr z0\.h, p7/m, z0\.h, z0\.h
+.*: 654c8003 fdivr z3\.h, p0/m, z3\.h, z0\.h
+.*: 654c8003 fdivr z3\.h, p0/m, z3\.h, z0\.h
+.*: 654c8080 fdivr z0\.h, p0/m, z0\.h, z4\.h
+.*: 654c8080 fdivr z0\.h, p0/m, z0\.h, z4\.h
+.*: 654c83e0 fdivr z0\.h, p0/m, z0\.h, z31\.h
+.*: 654c83e0 fdivr z0\.h, p0/m, z0\.h, z31\.h
.*: 658c8000 fdivr z0\.s, p0/m, z0\.s, z0\.s
.*: 658c8000 fdivr z0\.s, p0/m, z0\.s, z0\.s
.*: 658c8001 fdivr z1\.s, p0/m, z1\.s, z0\.s
@@ -9052,6 +9782,24 @@ Disassembly of section .*:
.*: 65cc8080 fdivr z0\.d, p0/m, z0\.d, z4\.d
.*: 65cc83e0 fdivr z0\.d, p0/m, z0\.d, z31\.d
.*: 65cc83e0 fdivr z0\.d, p0/m, z0\.d, z31\.d
+.*: 2579c000 fmov z0\.h, #2\.0+e\+00
+.*: 2579c000 fmov z0\.h, #2\.0+e\+00
+.*: 2579c001 fmov z1\.h, #2\.0+e\+00
+.*: 2579c001 fmov z1\.h, #2\.0+e\+00
+.*: 2579c01f fmov z31\.h, #2\.0+e\+00
+.*: 2579c01f fmov z31\.h, #2\.0+e\+00
+.*: 2579c600 fmov z0\.h, #1\.60+e\+01
+.*: 2579c600 fmov z0\.h, #1\.60+e\+01
+.*: 2579c900 fmov z0\.h, #1\.8750+e-01
+.*: 2579c900 fmov z0\.h, #1\.8750+e-01
+.*: 2579cfe0 fmov z0\.h, #1\.93750+e\+00
+.*: 2579cfe0 fmov z0\.h, #1\.93750+e\+00
+.*: 2579d100 fmov z0\.h, #-3\.0+e\+00
+.*: 2579d100 fmov z0\.h, #-3\.0+e\+00
+.*: 2579d800 fmov z0\.h, #-1\.250+e-01
+.*: 2579d800 fmov z0\.h, #-1\.250+e-01
+.*: 2579dfe0 fmov z0\.h, #-1\.93750+e\+00
+.*: 2579dfe0 fmov z0\.h, #-1\.93750+e\+00
.*: 25b9c000 fmov z0\.s, #2\.0+e\+00
.*: 25b9c000 fmov z0\.s, #2\.0+e\+00
.*: 25b9c001 fmov z1\.s, #2\.0+e\+00
@@ -9088,6 +9836,16 @@ Disassembly of section .*:
.*: 25f9d800 fmov z0\.d, #-1\.250+e-01
.*: 25f9dfe0 fmov z0\.d, #-1\.93750+e\+00
.*: 25f9dfe0 fmov z0\.d, #-1\.93750+e\+00
+.*: 0460b800 fexpa z0\.h, z0\.h
+.*: 0460b800 fexpa z0\.h, z0\.h
+.*: 0460b801 fexpa z1\.h, z0\.h
+.*: 0460b801 fexpa z1\.h, z0\.h
+.*: 0460b81f fexpa z31\.h, z0\.h
+.*: 0460b81f fexpa z31\.h, z0\.h
+.*: 0460b840 fexpa z0\.h, z2\.h
+.*: 0460b840 fexpa z0\.h, z2\.h
+.*: 0460bbe0 fexpa z0\.h, z31\.h
+.*: 0460bbe0 fexpa z0\.h, z31\.h
.*: 04a0b800 fexpa z0\.s, z0\.s
.*: 04a0b800 fexpa z0\.s, z0\.s
.*: 04a0b801 fexpa z1\.s, z0\.s
@@ -9108,6 +9866,24 @@ Disassembly of section .*:
.*: 04e0b840 fexpa z0\.d, z2\.d
.*: 04e0bbe0 fexpa z0\.d, z31\.d
.*: 04e0bbe0 fexpa z0\.d, z31\.d
+.*: 65608000 fmad z0\.h, p0/m, z0\.h, z0\.h
+.*: 65608000 fmad z0\.h, p0/m, z0\.h, z0\.h
+.*: 65608001 fmad z1\.h, p0/m, z0\.h, z0\.h
+.*: 65608001 fmad z1\.h, p0/m, z0\.h, z0\.h
+.*: 6560801f fmad z31\.h, p0/m, z0\.h, z0\.h
+.*: 6560801f fmad z31\.h, p0/m, z0\.h, z0\.h
+.*: 65608800 fmad z0\.h, p2/m, z0\.h, z0\.h
+.*: 65608800 fmad z0\.h, p2/m, z0\.h, z0\.h
+.*: 65609c00 fmad z0\.h, p7/m, z0\.h, z0\.h
+.*: 65609c00 fmad z0\.h, p7/m, z0\.h, z0\.h
+.*: 65608060 fmad z0\.h, p0/m, z3\.h, z0\.h
+.*: 65608060 fmad z0\.h, p0/m, z3\.h, z0\.h
+.*: 656083e0 fmad z0\.h, p0/m, z31\.h, z0\.h
+.*: 656083e0 fmad z0\.h, p0/m, z31\.h, z0\.h
+.*: 65648000 fmad z0\.h, p0/m, z0\.h, z4\.h
+.*: 65648000 fmad z0\.h, p0/m, z0\.h, z4\.h
+.*: 657f8000 fmad z0\.h, p0/m, z0\.h, z31\.h
+.*: 657f8000 fmad z0\.h, p0/m, z0\.h, z31\.h
.*: 65a08000 fmad z0\.s, p0/m, z0\.s, z0\.s
.*: 65a08000 fmad z0\.s, p0/m, z0\.s, z0\.s
.*: 65a08001 fmad z1\.s, p0/m, z0\.s, z0\.s
@@ -9144,6 +9920,22 @@ Disassembly of section .*:
.*: 65e48000 fmad z0\.d, p0/m, z0\.d, z4\.d
.*: 65ff8000 fmad z0\.d, p0/m, z0\.d, z31\.d
.*: 65ff8000 fmad z0\.d, p0/m, z0\.d, z31\.d
+.*: 65468000 fmax z0\.h, p0/m, z0\.h, z0\.h
+.*: 65468000 fmax z0\.h, p0/m, z0\.h, z0\.h
+.*: 65468001 fmax z1\.h, p0/m, z1\.h, z0\.h
+.*: 65468001 fmax z1\.h, p0/m, z1\.h, z0\.h
+.*: 6546801f fmax z31\.h, p0/m, z31\.h, z0\.h
+.*: 6546801f fmax z31\.h, p0/m, z31\.h, z0\.h
+.*: 65468800 fmax z0\.h, p2/m, z0\.h, z0\.h
+.*: 65468800 fmax z0\.h, p2/m, z0\.h, z0\.h
+.*: 65469c00 fmax z0\.h, p7/m, z0\.h, z0\.h
+.*: 65469c00 fmax z0\.h, p7/m, z0\.h, z0\.h
+.*: 65468003 fmax z3\.h, p0/m, z3\.h, z0\.h
+.*: 65468003 fmax z3\.h, p0/m, z3\.h, z0\.h
+.*: 65468080 fmax z0\.h, p0/m, z0\.h, z4\.h
+.*: 65468080 fmax z0\.h, p0/m, z0\.h, z4\.h
+.*: 654683e0 fmax z0\.h, p0/m, z0\.h, z31\.h
+.*: 654683e0 fmax z0\.h, p0/m, z0\.h, z31\.h
.*: 65868000 fmax z0\.s, p0/m, z0\.s, z0\.s
.*: 65868000 fmax z0\.s, p0/m, z0\.s, z0\.s
.*: 65868001 fmax z1\.s, p0/m, z1\.s, z0\.s
@@ -9176,6 +9968,34 @@ Disassembly of section .*:
.*: 65c68080 fmax z0\.d, p0/m, z0\.d, z4\.d
.*: 65c683e0 fmax z0\.d, p0/m, z0\.d, z31\.d
.*: 65c683e0 fmax z0\.d, p0/m, z0\.d, z31\.d
+.*: 655e8000 fmax z0\.h, p0/m, z0\.h, #0\.0
+.*: 655e8000 fmax z0\.h, p0/m, z0\.h, #0\.0
+.*: 655e8000 fmax z0\.h, p0/m, z0\.h, #0\.0
+.*: 655e8000 fmax z0\.h, p0/m, z0\.h, #0\.0
+.*: 655e8001 fmax z1\.h, p0/m, z1\.h, #0\.0
+.*: 655e8001 fmax z1\.h, p0/m, z1\.h, #0\.0
+.*: 655e8001 fmax z1\.h, p0/m, z1\.h, #0\.0
+.*: 655e8001 fmax z1\.h, p0/m, z1\.h, #0\.0
+.*: 655e801f fmax z31\.h, p0/m, z31\.h, #0\.0
+.*: 655e801f fmax z31\.h, p0/m, z31\.h, #0\.0
+.*: 655e801f fmax z31\.h, p0/m, z31\.h, #0\.0
+.*: 655e801f fmax z31\.h, p0/m, z31\.h, #0\.0
+.*: 655e8800 fmax z0\.h, p2/m, z0\.h, #0\.0
+.*: 655e8800 fmax z0\.h, p2/m, z0\.h, #0\.0
+.*: 655e8800 fmax z0\.h, p2/m, z0\.h, #0\.0
+.*: 655e8800 fmax z0\.h, p2/m, z0\.h, #0\.0
+.*: 655e9c00 fmax z0\.h, p7/m, z0\.h, #0\.0
+.*: 655e9c00 fmax z0\.h, p7/m, z0\.h, #0\.0
+.*: 655e9c00 fmax z0\.h, p7/m, z0\.h, #0\.0
+.*: 655e9c00 fmax z0\.h, p7/m, z0\.h, #0\.0
+.*: 655e8003 fmax z3\.h, p0/m, z3\.h, #0\.0
+.*: 655e8003 fmax z3\.h, p0/m, z3\.h, #0\.0
+.*: 655e8003 fmax z3\.h, p0/m, z3\.h, #0\.0
+.*: 655e8003 fmax z3\.h, p0/m, z3\.h, #0\.0
+.*: 655e8020 fmax z0\.h, p0/m, z0\.h, #1\.0
+.*: 655e8020 fmax z0\.h, p0/m, z0\.h, #1\.0
+.*: 655e8020 fmax z0\.h, p0/m, z0\.h, #1\.0
+.*: 655e8020 fmax z0\.h, p0/m, z0\.h, #1\.0
.*: 659e8000 fmax z0\.s, p0/m, z0\.s, #0\.0
.*: 659e8000 fmax z0\.s, p0/m, z0\.s, #0\.0
.*: 659e8000 fmax z0\.s, p0/m, z0\.s, #0\.0
@@ -9232,6 +10052,22 @@ Disassembly of section .*:
.*: 65de8020 fmax z0\.d, p0/m, z0\.d, #1\.0
.*: 65de8020 fmax z0\.d, p0/m, z0\.d, #1\.0
.*: 65de8020 fmax z0\.d, p0/m, z0\.d, #1\.0
+.*: 65448000 fmaxnm z0\.h, p0/m, z0\.h, z0\.h
+.*: 65448000 fmaxnm z0\.h, p0/m, z0\.h, z0\.h
+.*: 65448001 fmaxnm z1\.h, p0/m, z1\.h, z0\.h
+.*: 65448001 fmaxnm z1\.h, p0/m, z1\.h, z0\.h
+.*: 6544801f fmaxnm z31\.h, p0/m, z31\.h, z0\.h
+.*: 6544801f fmaxnm z31\.h, p0/m, z31\.h, z0\.h
+.*: 65448800 fmaxnm z0\.h, p2/m, z0\.h, z0\.h
+.*: 65448800 fmaxnm z0\.h, p2/m, z0\.h, z0\.h
+.*: 65449c00 fmaxnm z0\.h, p7/m, z0\.h, z0\.h
+.*: 65449c00 fmaxnm z0\.h, p7/m, z0\.h, z0\.h
+.*: 65448003 fmaxnm z3\.h, p0/m, z3\.h, z0\.h
+.*: 65448003 fmaxnm z3\.h, p0/m, z3\.h, z0\.h
+.*: 65448080 fmaxnm z0\.h, p0/m, z0\.h, z4\.h
+.*: 65448080 fmaxnm z0\.h, p0/m, z0\.h, z4\.h
+.*: 654483e0 fmaxnm z0\.h, p0/m, z0\.h, z31\.h
+.*: 654483e0 fmaxnm z0\.h, p0/m, z0\.h, z31\.h
.*: 65848000 fmaxnm z0\.s, p0/m, z0\.s, z0\.s
.*: 65848000 fmaxnm z0\.s, p0/m, z0\.s, z0\.s
.*: 65848001 fmaxnm z1\.s, p0/m, z1\.s, z0\.s
@@ -9264,6 +10100,34 @@ Disassembly of section .*:
.*: 65c48080 fmaxnm z0\.d, p0/m, z0\.d, z4\.d
.*: 65c483e0 fmaxnm z0\.d, p0/m, z0\.d, z31\.d
.*: 65c483e0 fmaxnm z0\.d, p0/m, z0\.d, z31\.d
+.*: 655c8000 fmaxnm z0\.h, p0/m, z0\.h, #0\.0
+.*: 655c8000 fmaxnm z0\.h, p0/m, z0\.h, #0\.0
+.*: 655c8000 fmaxnm z0\.h, p0/m, z0\.h, #0\.0
+.*: 655c8000 fmaxnm z0\.h, p0/m, z0\.h, #0\.0
+.*: 655c8001 fmaxnm z1\.h, p0/m, z1\.h, #0\.0
+.*: 655c8001 fmaxnm z1\.h, p0/m, z1\.h, #0\.0
+.*: 655c8001 fmaxnm z1\.h, p0/m, z1\.h, #0\.0
+.*: 655c8001 fmaxnm z1\.h, p0/m, z1\.h, #0\.0
+.*: 655c801f fmaxnm z31\.h, p0/m, z31\.h, #0\.0
+.*: 655c801f fmaxnm z31\.h, p0/m, z31\.h, #0\.0
+.*: 655c801f fmaxnm z31\.h, p0/m, z31\.h, #0\.0
+.*: 655c801f fmaxnm z31\.h, p0/m, z31\.h, #0\.0
+.*: 655c8800 fmaxnm z0\.h, p2/m, z0\.h, #0\.0
+.*: 655c8800 fmaxnm z0\.h, p2/m, z0\.h, #0\.0
+.*: 655c8800 fmaxnm z0\.h, p2/m, z0\.h, #0\.0
+.*: 655c8800 fmaxnm z0\.h, p2/m, z0\.h, #0\.0
+.*: 655c9c00 fmaxnm z0\.h, p7/m, z0\.h, #0\.0
+.*: 655c9c00 fmaxnm z0\.h, p7/m, z0\.h, #0\.0
+.*: 655c9c00 fmaxnm z0\.h, p7/m, z0\.h, #0\.0
+.*: 655c9c00 fmaxnm z0\.h, p7/m, z0\.h, #0\.0
+.*: 655c8003 fmaxnm z3\.h, p0/m, z3\.h, #0\.0
+.*: 655c8003 fmaxnm z3\.h, p0/m, z3\.h, #0\.0
+.*: 655c8003 fmaxnm z3\.h, p0/m, z3\.h, #0\.0
+.*: 655c8003 fmaxnm z3\.h, p0/m, z3\.h, #0\.0
+.*: 655c8020 fmaxnm z0\.h, p0/m, z0\.h, #1\.0
+.*: 655c8020 fmaxnm z0\.h, p0/m, z0\.h, #1\.0
+.*: 655c8020 fmaxnm z0\.h, p0/m, z0\.h, #1\.0
+.*: 655c8020 fmaxnm z0\.h, p0/m, z0\.h, #1\.0
.*: 659c8000 fmaxnm z0\.s, p0/m, z0\.s, #0\.0
.*: 659c8000 fmaxnm z0\.s, p0/m, z0\.s, #0\.0
.*: 659c8000 fmaxnm z0\.s, p0/m, z0\.s, #0\.0
@@ -9320,6 +10184,20 @@ Disassembly of section .*:
.*: 65dc8020 fmaxnm z0\.d, p0/m, z0\.d, #1\.0
.*: 65dc8020 fmaxnm z0\.d, p0/m, z0\.d, #1\.0
.*: 65dc8020 fmaxnm z0\.d, p0/m, z0\.d, #1\.0
+.*: 65442000 fmaxnmv h0, p0, z0\.h
+.*: 65442000 fmaxnmv h0, p0, z0\.h
+.*: 65442001 fmaxnmv h1, p0, z0\.h
+.*: 65442001 fmaxnmv h1, p0, z0\.h
+.*: 6544201f fmaxnmv h31, p0, z0\.h
+.*: 6544201f fmaxnmv h31, p0, z0\.h
+.*: 65442800 fmaxnmv h0, p2, z0\.h
+.*: 65442800 fmaxnmv h0, p2, z0\.h
+.*: 65443c00 fmaxnmv h0, p7, z0\.h
+.*: 65443c00 fmaxnmv h0, p7, z0\.h
+.*: 65442060 fmaxnmv h0, p0, z3\.h
+.*: 65442060 fmaxnmv h0, p0, z3\.h
+.*: 654423e0 fmaxnmv h0, p0, z31\.h
+.*: 654423e0 fmaxnmv h0, p0, z31\.h
.*: 65842000 fmaxnmv s0, p0, z0\.s
.*: 65842000 fmaxnmv s0, p0, z0\.s
.*: 65842001 fmaxnmv s1, p0, z0\.s
@@ -9348,6 +10226,20 @@ Disassembly of section .*:
.*: 65c42060 fmaxnmv d0, p0, z3\.d
.*: 65c423e0 fmaxnmv d0, p0, z31\.d
.*: 65c423e0 fmaxnmv d0, p0, z31\.d
+.*: 65462000 fmaxv h0, p0, z0\.h
+.*: 65462000 fmaxv h0, p0, z0\.h
+.*: 65462001 fmaxv h1, p0, z0\.h
+.*: 65462001 fmaxv h1, p0, z0\.h
+.*: 6546201f fmaxv h31, p0, z0\.h
+.*: 6546201f fmaxv h31, p0, z0\.h
+.*: 65462800 fmaxv h0, p2, z0\.h
+.*: 65462800 fmaxv h0, p2, z0\.h
+.*: 65463c00 fmaxv h0, p7, z0\.h
+.*: 65463c00 fmaxv h0, p7, z0\.h
+.*: 65462060 fmaxv h0, p0, z3\.h
+.*: 65462060 fmaxv h0, p0, z3\.h
+.*: 654623e0 fmaxv h0, p0, z31\.h
+.*: 654623e0 fmaxv h0, p0, z31\.h
.*: 65862000 fmaxv s0, p0, z0\.s
.*: 65862000 fmaxv s0, p0, z0\.s
.*: 65862001 fmaxv s1, p0, z0\.s
@@ -9376,6 +10268,22 @@ Disassembly of section .*:
.*: 65c62060 fmaxv d0, p0, z3\.d
.*: 65c623e0 fmaxv d0, p0, z31\.d
.*: 65c623e0 fmaxv d0, p0, z31\.d
+.*: 65478000 fmin z0\.h, p0/m, z0\.h, z0\.h
+.*: 65478000 fmin z0\.h, p0/m, z0\.h, z0\.h
+.*: 65478001 fmin z1\.h, p0/m, z1\.h, z0\.h
+.*: 65478001 fmin z1\.h, p0/m, z1\.h, z0\.h
+.*: 6547801f fmin z31\.h, p0/m, z31\.h, z0\.h
+.*: 6547801f fmin z31\.h, p0/m, z31\.h, z0\.h
+.*: 65478800 fmin z0\.h, p2/m, z0\.h, z0\.h
+.*: 65478800 fmin z0\.h, p2/m, z0\.h, z0\.h
+.*: 65479c00 fmin z0\.h, p7/m, z0\.h, z0\.h
+.*: 65479c00 fmin z0\.h, p7/m, z0\.h, z0\.h
+.*: 65478003 fmin z3\.h, p0/m, z3\.h, z0\.h
+.*: 65478003 fmin z3\.h, p0/m, z3\.h, z0\.h
+.*: 65478080 fmin z0\.h, p0/m, z0\.h, z4\.h
+.*: 65478080 fmin z0\.h, p0/m, z0\.h, z4\.h
+.*: 654783e0 fmin z0\.h, p0/m, z0\.h, z31\.h
+.*: 654783e0 fmin z0\.h, p0/m, z0\.h, z31\.h
.*: 65878000 fmin z0\.s, p0/m, z0\.s, z0\.s
.*: 65878000 fmin z0\.s, p0/m, z0\.s, z0\.s
.*: 65878001 fmin z1\.s, p0/m, z1\.s, z0\.s
@@ -9408,6 +10316,34 @@ Disassembly of section .*:
.*: 65c78080 fmin z0\.d, p0/m, z0\.d, z4\.d
.*: 65c783e0 fmin z0\.d, p0/m, z0\.d, z31\.d
.*: 65c783e0 fmin z0\.d, p0/m, z0\.d, z31\.d
+.*: 655f8000 fmin z0\.h, p0/m, z0\.h, #0\.0
+.*: 655f8000 fmin z0\.h, p0/m, z0\.h, #0\.0
+.*: 655f8000 fmin z0\.h, p0/m, z0\.h, #0\.0
+.*: 655f8000 fmin z0\.h, p0/m, z0\.h, #0\.0
+.*: 655f8001 fmin z1\.h, p0/m, z1\.h, #0\.0
+.*: 655f8001 fmin z1\.h, p0/m, z1\.h, #0\.0
+.*: 655f8001 fmin z1\.h, p0/m, z1\.h, #0\.0
+.*: 655f8001 fmin z1\.h, p0/m, z1\.h, #0\.0
+.*: 655f801f fmin z31\.h, p0/m, z31\.h, #0\.0
+.*: 655f801f fmin z31\.h, p0/m, z31\.h, #0\.0
+.*: 655f801f fmin z31\.h, p0/m, z31\.h, #0\.0
+.*: 655f801f fmin z31\.h, p0/m, z31\.h, #0\.0
+.*: 655f8800 fmin z0\.h, p2/m, z0\.h, #0\.0
+.*: 655f8800 fmin z0\.h, p2/m, z0\.h, #0\.0
+.*: 655f8800 fmin z0\.h, p2/m, z0\.h, #0\.0
+.*: 655f8800 fmin z0\.h, p2/m, z0\.h, #0\.0
+.*: 655f9c00 fmin z0\.h, p7/m, z0\.h, #0\.0
+.*: 655f9c00 fmin z0\.h, p7/m, z0\.h, #0\.0
+.*: 655f9c00 fmin z0\.h, p7/m, z0\.h, #0\.0
+.*: 655f9c00 fmin z0\.h, p7/m, z0\.h, #0\.0
+.*: 655f8003 fmin z3\.h, p0/m, z3\.h, #0\.0
+.*: 655f8003 fmin z3\.h, p0/m, z3\.h, #0\.0
+.*: 655f8003 fmin z3\.h, p0/m, z3\.h, #0\.0
+.*: 655f8003 fmin z3\.h, p0/m, z3\.h, #0\.0
+.*: 655f8020 fmin z0\.h, p0/m, z0\.h, #1\.0
+.*: 655f8020 fmin z0\.h, p0/m, z0\.h, #1\.0
+.*: 655f8020 fmin z0\.h, p0/m, z0\.h, #1\.0
+.*: 655f8020 fmin z0\.h, p0/m, z0\.h, #1\.0
.*: 659f8000 fmin z0\.s, p0/m, z0\.s, #0\.0
.*: 659f8000 fmin z0\.s, p0/m, z0\.s, #0\.0
.*: 659f8000 fmin z0\.s, p0/m, z0\.s, #0\.0
@@ -9464,6 +10400,22 @@ Disassembly of section .*:
.*: 65df8020 fmin z0\.d, p0/m, z0\.d, #1\.0
.*: 65df8020 fmin z0\.d, p0/m, z0\.d, #1\.0
.*: 65df8020 fmin z0\.d, p0/m, z0\.d, #1\.0
+.*: 65458000 fminnm z0\.h, p0/m, z0\.h, z0\.h
+.*: 65458000 fminnm z0\.h, p0/m, z0\.h, z0\.h
+.*: 65458001 fminnm z1\.h, p0/m, z1\.h, z0\.h
+.*: 65458001 fminnm z1\.h, p0/m, z1\.h, z0\.h
+.*: 6545801f fminnm z31\.h, p0/m, z31\.h, z0\.h
+.*: 6545801f fminnm z31\.h, p0/m, z31\.h, z0\.h
+.*: 65458800 fminnm z0\.h, p2/m, z0\.h, z0\.h
+.*: 65458800 fminnm z0\.h, p2/m, z0\.h, z0\.h
+.*: 65459c00 fminnm z0\.h, p7/m, z0\.h, z0\.h
+.*: 65459c00 fminnm z0\.h, p7/m, z0\.h, z0\.h
+.*: 65458003 fminnm z3\.h, p0/m, z3\.h, z0\.h
+.*: 65458003 fminnm z3\.h, p0/m, z3\.h, z0\.h
+.*: 65458080 fminnm z0\.h, p0/m, z0\.h, z4\.h
+.*: 65458080 fminnm z0\.h, p0/m, z0\.h, z4\.h
+.*: 654583e0 fminnm z0\.h, p0/m, z0\.h, z31\.h
+.*: 654583e0 fminnm z0\.h, p0/m, z0\.h, z31\.h
.*: 65858000 fminnm z0\.s, p0/m, z0\.s, z0\.s
.*: 65858000 fminnm z0\.s, p0/m, z0\.s, z0\.s
.*: 65858001 fminnm z1\.s, p0/m, z1\.s, z0\.s
@@ -9496,6 +10448,34 @@ Disassembly of section .*:
.*: 65c58080 fminnm z0\.d, p0/m, z0\.d, z4\.d
.*: 65c583e0 fminnm z0\.d, p0/m, z0\.d, z31\.d
.*: 65c583e0 fminnm z0\.d, p0/m, z0\.d, z31\.d
+.*: 655d8000 fminnm z0\.h, p0/m, z0\.h, #0\.0
+.*: 655d8000 fminnm z0\.h, p0/m, z0\.h, #0\.0
+.*: 655d8000 fminnm z0\.h, p0/m, z0\.h, #0\.0
+.*: 655d8000 fminnm z0\.h, p0/m, z0\.h, #0\.0
+.*: 655d8001 fminnm z1\.h, p0/m, z1\.h, #0\.0
+.*: 655d8001 fminnm z1\.h, p0/m, z1\.h, #0\.0
+.*: 655d8001 fminnm z1\.h, p0/m, z1\.h, #0\.0
+.*: 655d8001 fminnm z1\.h, p0/m, z1\.h, #0\.0
+.*: 655d801f fminnm z31\.h, p0/m, z31\.h, #0\.0
+.*: 655d801f fminnm z31\.h, p0/m, z31\.h, #0\.0
+.*: 655d801f fminnm z31\.h, p0/m, z31\.h, #0\.0
+.*: 655d801f fminnm z31\.h, p0/m, z31\.h, #0\.0
+.*: 655d8800 fminnm z0\.h, p2/m, z0\.h, #0\.0
+.*: 655d8800 fminnm z0\.h, p2/m, z0\.h, #0\.0
+.*: 655d8800 fminnm z0\.h, p2/m, z0\.h, #0\.0
+.*: 655d8800 fminnm z0\.h, p2/m, z0\.h, #0\.0
+.*: 655d9c00 fminnm z0\.h, p7/m, z0\.h, #0\.0
+.*: 655d9c00 fminnm z0\.h, p7/m, z0\.h, #0\.0
+.*: 655d9c00 fminnm z0\.h, p7/m, z0\.h, #0\.0
+.*: 655d9c00 fminnm z0\.h, p7/m, z0\.h, #0\.0
+.*: 655d8003 fminnm z3\.h, p0/m, z3\.h, #0\.0
+.*: 655d8003 fminnm z3\.h, p0/m, z3\.h, #0\.0
+.*: 655d8003 fminnm z3\.h, p0/m, z3\.h, #0\.0
+.*: 655d8003 fminnm z3\.h, p0/m, z3\.h, #0\.0
+.*: 655d8020 fminnm z0\.h, p0/m, z0\.h, #1\.0
+.*: 655d8020 fminnm z0\.h, p0/m, z0\.h, #1\.0
+.*: 655d8020 fminnm z0\.h, p0/m, z0\.h, #1\.0
+.*: 655d8020 fminnm z0\.h, p0/m, z0\.h, #1\.0
.*: 659d8000 fminnm z0\.s, p0/m, z0\.s, #0\.0
.*: 659d8000 fminnm z0\.s, p0/m, z0\.s, #0\.0
.*: 659d8000 fminnm z0\.s, p0/m, z0\.s, #0\.0
@@ -9552,6 +10532,20 @@ Disassembly of section .*:
.*: 65dd8020 fminnm z0\.d, p0/m, z0\.d, #1\.0
.*: 65dd8020 fminnm z0\.d, p0/m, z0\.d, #1\.0
.*: 65dd8020 fminnm z0\.d, p0/m, z0\.d, #1\.0
+.*: 65452000 fminnmv h0, p0, z0\.h
+.*: 65452000 fminnmv h0, p0, z0\.h
+.*: 65452001 fminnmv h1, p0, z0\.h
+.*: 65452001 fminnmv h1, p0, z0\.h
+.*: 6545201f fminnmv h31, p0, z0\.h
+.*: 6545201f fminnmv h31, p0, z0\.h
+.*: 65452800 fminnmv h0, p2, z0\.h
+.*: 65452800 fminnmv h0, p2, z0\.h
+.*: 65453c00 fminnmv h0, p7, z0\.h
+.*: 65453c00 fminnmv h0, p7, z0\.h
+.*: 65452060 fminnmv h0, p0, z3\.h
+.*: 65452060 fminnmv h0, p0, z3\.h
+.*: 654523e0 fminnmv h0, p0, z31\.h
+.*: 654523e0 fminnmv h0, p0, z31\.h
.*: 65852000 fminnmv s0, p0, z0\.s
.*: 65852000 fminnmv s0, p0, z0\.s
.*: 65852001 fminnmv s1, p0, z0\.s
@@ -9580,6 +10574,20 @@ Disassembly of section .*:
.*: 65c52060 fminnmv d0, p0, z3\.d
.*: 65c523e0 fminnmv d0, p0, z31\.d
.*: 65c523e0 fminnmv d0, p0, z31\.d
+.*: 65472000 fminv h0, p0, z0\.h
+.*: 65472000 fminv h0, p0, z0\.h
+.*: 65472001 fminv h1, p0, z0\.h
+.*: 65472001 fminv h1, p0, z0\.h
+.*: 6547201f fminv h31, p0, z0\.h
+.*: 6547201f fminv h31, p0, z0\.h
+.*: 65472800 fminv h0, p2, z0\.h
+.*: 65472800 fminv h0, p2, z0\.h
+.*: 65473c00 fminv h0, p7, z0\.h
+.*: 65473c00 fminv h0, p7, z0\.h
+.*: 65472060 fminv h0, p0, z3\.h
+.*: 65472060 fminv h0, p0, z3\.h
+.*: 654723e0 fminv h0, p0, z31\.h
+.*: 654723e0 fminv h0, p0, z31\.h
.*: 65872000 fminv s0, p0, z0\.s
.*: 65872000 fminv s0, p0, z0\.s
.*: 65872001 fminv s1, p0, z0\.s
@@ -9608,6 +10616,24 @@ Disassembly of section .*:
.*: 65c72060 fminv d0, p0, z3\.d
.*: 65c723e0 fminv d0, p0, z31\.d
.*: 65c723e0 fminv d0, p0, z31\.d
+.*: 65600000 fmla z0\.h, p0/m, z0\.h, z0\.h
+.*: 65600000 fmla z0\.h, p0/m, z0\.h, z0\.h
+.*: 65600001 fmla z1\.h, p0/m, z0\.h, z0\.h
+.*: 65600001 fmla z1\.h, p0/m, z0\.h, z0\.h
+.*: 6560001f fmla z31\.h, p0/m, z0\.h, z0\.h
+.*: 6560001f fmla z31\.h, p0/m, z0\.h, z0\.h
+.*: 65600800 fmla z0\.h, p2/m, z0\.h, z0\.h
+.*: 65600800 fmla z0\.h, p2/m, z0\.h, z0\.h
+.*: 65601c00 fmla z0\.h, p7/m, z0\.h, z0\.h
+.*: 65601c00 fmla z0\.h, p7/m, z0\.h, z0\.h
+.*: 65600060 fmla z0\.h, p0/m, z3\.h, z0\.h
+.*: 65600060 fmla z0\.h, p0/m, z3\.h, z0\.h
+.*: 656003e0 fmla z0\.h, p0/m, z31\.h, z0\.h
+.*: 656003e0 fmla z0\.h, p0/m, z31\.h, z0\.h
+.*: 65640000 fmla z0\.h, p0/m, z0\.h, z4\.h
+.*: 65640000 fmla z0\.h, p0/m, z0\.h, z4\.h
+.*: 657f0000 fmla z0\.h, p0/m, z0\.h, z31\.h
+.*: 657f0000 fmla z0\.h, p0/m, z0\.h, z31\.h
.*: 65a00000 fmla z0\.s, p0/m, z0\.s, z0\.s
.*: 65a00000 fmla z0\.s, p0/m, z0\.s, z0\.s
.*: 65a00001 fmla z1\.s, p0/m, z0\.s, z0\.s
@@ -9644,6 +10670,90 @@ Disassembly of section .*:
.*: 65e40000 fmla z0\.d, p0/m, z0\.d, z4\.d
.*: 65ff0000 fmla z0\.d, p0/m, z0\.d, z31\.d
.*: 65ff0000 fmla z0\.d, p0/m, z0\.d, z31\.d
+.*: 64200000 fmla z0\.h, z0\.h, z0\.h\[0\]
+.*: 64200000 fmla z0\.h, z0\.h, z0\.h\[0\]
+.*: 64200001 fmla z1\.h, z0\.h, z0\.h\[0\]
+.*: 64200001 fmla z1\.h, z0\.h, z0\.h\[0\]
+.*: 6420001f fmla z31\.h, z0\.h, z0\.h\[0\]
+.*: 6420001f fmla z31\.h, z0\.h, z0\.h\[0\]
+.*: 64200040 fmla z0\.h, z2\.h, z0\.h\[0\]
+.*: 64200040 fmla z0\.h, z2\.h, z0\.h\[0\]
+.*: 642003e0 fmla z0\.h, z31\.h, z0\.h\[0\]
+.*: 642003e0 fmla z0\.h, z31\.h, z0\.h\[0\]
+.*: 64230000 fmla z0\.h, z0\.h, z3\.h\[0\]
+.*: 64230000 fmla z0\.h, z0\.h, z3\.h\[0\]
+.*: 64270000 fmla z0\.h, z0\.h, z7\.h\[0\]
+.*: 64270000 fmla z0\.h, z0\.h, z7\.h\[0\]
+.*: 64280000 fmla z0\.h, z0\.h, z0\.h\[1\]
+.*: 64280000 fmla z0\.h, z0\.h, z0\.h\[1\]
+.*: 642c0000 fmla z0\.h, z0\.h, z4\.h\[1\]
+.*: 642c0000 fmla z0\.h, z0\.h, z4\.h\[1\]
+.*: 64630000 fmla z0\.h, z0\.h, z3\.h\[4\]
+.*: 64630000 fmla z0\.h, z0\.h, z3\.h\[4\]
+.*: 64780000 fmla z0\.h, z0\.h, z0\.h\[7\]
+.*: 64780000 fmla z0\.h, z0\.h, z0\.h\[7\]
+.*: 647d0000 fmla z0\.h, z0\.h, z5\.h\[7\]
+.*: 647d0000 fmla z0\.h, z0\.h, z5\.h\[7\]
+.*: 64a00000 fmla z0\.s, z0\.s, z0\.s\[0\]
+.*: 64a00000 fmla z0\.s, z0\.s, z0\.s\[0\]
+.*: 64a00001 fmla z1\.s, z0\.s, z0\.s\[0\]
+.*: 64a00001 fmla z1\.s, z0\.s, z0\.s\[0\]
+.*: 64a0001f fmla z31\.s, z0\.s, z0\.s\[0\]
+.*: 64a0001f fmla z31\.s, z0\.s, z0\.s\[0\]
+.*: 64a00040 fmla z0\.s, z2\.s, z0\.s\[0\]
+.*: 64a00040 fmla z0\.s, z2\.s, z0\.s\[0\]
+.*: 64a003e0 fmla z0\.s, z31\.s, z0\.s\[0\]
+.*: 64a003e0 fmla z0\.s, z31\.s, z0\.s\[0\]
+.*: 64a30000 fmla z0\.s, z0\.s, z3\.s\[0\]
+.*: 64a30000 fmla z0\.s, z0\.s, z3\.s\[0\]
+.*: 64a70000 fmla z0\.s, z0\.s, z7\.s\[0\]
+.*: 64a70000 fmla z0\.s, z0\.s, z7\.s\[0\]
+.*: 64a80000 fmla z0\.s, z0\.s, z0\.s\[1\]
+.*: 64a80000 fmla z0\.s, z0\.s, z0\.s\[1\]
+.*: 64ac0000 fmla z0\.s, z0\.s, z4\.s\[1\]
+.*: 64ac0000 fmla z0\.s, z0\.s, z4\.s\[1\]
+.*: 64b30000 fmla z0\.s, z0\.s, z3\.s\[2\]
+.*: 64b30000 fmla z0\.s, z0\.s, z3\.s\[2\]
+.*: 64b80000 fmla z0\.s, z0\.s, z0\.s\[3\]
+.*: 64b80000 fmla z0\.s, z0\.s, z0\.s\[3\]
+.*: 64bd0000 fmla z0\.s, z0\.s, z5\.s\[3\]
+.*: 64bd0000 fmla z0\.s, z0\.s, z5\.s\[3\]
+.*: 64e00000 fmla z0\.d, z0\.d, z0\.d\[0\]
+.*: 64e00000 fmla z0\.d, z0\.d, z0\.d\[0\]
+.*: 64e00001 fmla z1\.d, z0\.d, z0\.d\[0\]
+.*: 64e00001 fmla z1\.d, z0\.d, z0\.d\[0\]
+.*: 64e0001f fmla z31\.d, z0\.d, z0\.d\[0\]
+.*: 64e0001f fmla z31\.d, z0\.d, z0\.d\[0\]
+.*: 64e00040 fmla z0\.d, z2\.d, z0\.d\[0\]
+.*: 64e00040 fmla z0\.d, z2\.d, z0\.d\[0\]
+.*: 64e003e0 fmla z0\.d, z31\.d, z0\.d\[0\]
+.*: 64e003e0 fmla z0\.d, z31\.d, z0\.d\[0\]
+.*: 64e30000 fmla z0\.d, z0\.d, z3\.d\[0\]
+.*: 64e30000 fmla z0\.d, z0\.d, z3\.d\[0\]
+.*: 64ef0000 fmla z0\.d, z0\.d, z15\.d\[0\]
+.*: 64ef0000 fmla z0\.d, z0\.d, z15\.d\[0\]
+.*: 64f00000 fmla z0\.d, z0\.d, z0\.d\[1\]
+.*: 64f00000 fmla z0\.d, z0\.d, z0\.d\[1\]
+.*: 64fb0000 fmla z0\.d, z0\.d, z11\.d\[1\]
+.*: 64fb0000 fmla z0\.d, z0\.d, z11\.d\[1\]
+.*: 65602000 fmls z0\.h, p0/m, z0\.h, z0\.h
+.*: 65602000 fmls z0\.h, p0/m, z0\.h, z0\.h
+.*: 65602001 fmls z1\.h, p0/m, z0\.h, z0\.h
+.*: 65602001 fmls z1\.h, p0/m, z0\.h, z0\.h
+.*: 6560201f fmls z31\.h, p0/m, z0\.h, z0\.h
+.*: 6560201f fmls z31\.h, p0/m, z0\.h, z0\.h
+.*: 65602800 fmls z0\.h, p2/m, z0\.h, z0\.h
+.*: 65602800 fmls z0\.h, p2/m, z0\.h, z0\.h
+.*: 65603c00 fmls z0\.h, p7/m, z0\.h, z0\.h
+.*: 65603c00 fmls z0\.h, p7/m, z0\.h, z0\.h
+.*: 65602060 fmls z0\.h, p0/m, z3\.h, z0\.h
+.*: 65602060 fmls z0\.h, p0/m, z3\.h, z0\.h
+.*: 656023e0 fmls z0\.h, p0/m, z31\.h, z0\.h
+.*: 656023e0 fmls z0\.h, p0/m, z31\.h, z0\.h
+.*: 65642000 fmls z0\.h, p0/m, z0\.h, z4\.h
+.*: 65642000 fmls z0\.h, p0/m, z0\.h, z4\.h
+.*: 657f2000 fmls z0\.h, p0/m, z0\.h, z31\.h
+.*: 657f2000 fmls z0\.h, p0/m, z0\.h, z31\.h
.*: 65a02000 fmls z0\.s, p0/m, z0\.s, z0\.s
.*: 65a02000 fmls z0\.s, p0/m, z0\.s, z0\.s
.*: 65a02001 fmls z1\.s, p0/m, z0\.s, z0\.s
@@ -9680,6 +10790,90 @@ Disassembly of section .*:
.*: 65e42000 fmls z0\.d, p0/m, z0\.d, z4\.d
.*: 65ff2000 fmls z0\.d, p0/m, z0\.d, z31\.d
.*: 65ff2000 fmls z0\.d, p0/m, z0\.d, z31\.d
+.*: 64200400 fmls z0\.h, z0\.h, z0\.h\[0\]
+.*: 64200400 fmls z0\.h, z0\.h, z0\.h\[0\]
+.*: 64200401 fmls z1\.h, z0\.h, z0\.h\[0\]
+.*: 64200401 fmls z1\.h, z0\.h, z0\.h\[0\]
+.*: 6420041f fmls z31\.h, z0\.h, z0\.h\[0\]
+.*: 6420041f fmls z31\.h, z0\.h, z0\.h\[0\]
+.*: 64200440 fmls z0\.h, z2\.h, z0\.h\[0\]
+.*: 64200440 fmls z0\.h, z2\.h, z0\.h\[0\]
+.*: 642007e0 fmls z0\.h, z31\.h, z0\.h\[0\]
+.*: 642007e0 fmls z0\.h, z31\.h, z0\.h\[0\]
+.*: 64230400 fmls z0\.h, z0\.h, z3\.h\[0\]
+.*: 64230400 fmls z0\.h, z0\.h, z3\.h\[0\]
+.*: 64270400 fmls z0\.h, z0\.h, z7\.h\[0\]
+.*: 64270400 fmls z0\.h, z0\.h, z7\.h\[0\]
+.*: 64280400 fmls z0\.h, z0\.h, z0\.h\[1\]
+.*: 64280400 fmls z0\.h, z0\.h, z0\.h\[1\]
+.*: 642c0400 fmls z0\.h, z0\.h, z4\.h\[1\]
+.*: 642c0400 fmls z0\.h, z0\.h, z4\.h\[1\]
+.*: 64630400 fmls z0\.h, z0\.h, z3\.h\[4\]
+.*: 64630400 fmls z0\.h, z0\.h, z3\.h\[4\]
+.*: 64780400 fmls z0\.h, z0\.h, z0\.h\[7\]
+.*: 64780400 fmls z0\.h, z0\.h, z0\.h\[7\]
+.*: 647d0400 fmls z0\.h, z0\.h, z5\.h\[7\]
+.*: 647d0400 fmls z0\.h, z0\.h, z5\.h\[7\]
+.*: 64a00400 fmls z0\.s, z0\.s, z0\.s\[0\]
+.*: 64a00400 fmls z0\.s, z0\.s, z0\.s\[0\]
+.*: 64a00401 fmls z1\.s, z0\.s, z0\.s\[0\]
+.*: 64a00401 fmls z1\.s, z0\.s, z0\.s\[0\]
+.*: 64a0041f fmls z31\.s, z0\.s, z0\.s\[0\]
+.*: 64a0041f fmls z31\.s, z0\.s, z0\.s\[0\]
+.*: 64a00440 fmls z0\.s, z2\.s, z0\.s\[0\]
+.*: 64a00440 fmls z0\.s, z2\.s, z0\.s\[0\]
+.*: 64a007e0 fmls z0\.s, z31\.s, z0\.s\[0\]
+.*: 64a007e0 fmls z0\.s, z31\.s, z0\.s\[0\]
+.*: 64a30400 fmls z0\.s, z0\.s, z3\.s\[0\]
+.*: 64a30400 fmls z0\.s, z0\.s, z3\.s\[0\]
+.*: 64a70400 fmls z0\.s, z0\.s, z7\.s\[0\]
+.*: 64a70400 fmls z0\.s, z0\.s, z7\.s\[0\]
+.*: 64a80400 fmls z0\.s, z0\.s, z0\.s\[1\]
+.*: 64a80400 fmls z0\.s, z0\.s, z0\.s\[1\]
+.*: 64ac0400 fmls z0\.s, z0\.s, z4\.s\[1\]
+.*: 64ac0400 fmls z0\.s, z0\.s, z4\.s\[1\]
+.*: 64b30400 fmls z0\.s, z0\.s, z3\.s\[2\]
+.*: 64b30400 fmls z0\.s, z0\.s, z3\.s\[2\]
+.*: 64b80400 fmls z0\.s, z0\.s, z0\.s\[3\]
+.*: 64b80400 fmls z0\.s, z0\.s, z0\.s\[3\]
+.*: 64bd0400 fmls z0\.s, z0\.s, z5\.s\[3\]
+.*: 64bd0400 fmls z0\.s, z0\.s, z5\.s\[3\]
+.*: 64e00400 fmls z0\.d, z0\.d, z0\.d\[0\]
+.*: 64e00400 fmls z0\.d, z0\.d, z0\.d\[0\]
+.*: 64e00401 fmls z1\.d, z0\.d, z0\.d\[0\]
+.*: 64e00401 fmls z1\.d, z0\.d, z0\.d\[0\]
+.*: 64e0041f fmls z31\.d, z0\.d, z0\.d\[0\]
+.*: 64e0041f fmls z31\.d, z0\.d, z0\.d\[0\]
+.*: 64e00440 fmls z0\.d, z2\.d, z0\.d\[0\]
+.*: 64e00440 fmls z0\.d, z2\.d, z0\.d\[0\]
+.*: 64e007e0 fmls z0\.d, z31\.d, z0\.d\[0\]
+.*: 64e007e0 fmls z0\.d, z31\.d, z0\.d\[0\]
+.*: 64e30400 fmls z0\.d, z0\.d, z3\.d\[0\]
+.*: 64e30400 fmls z0\.d, z0\.d, z3\.d\[0\]
+.*: 64ef0400 fmls z0\.d, z0\.d, z15\.d\[0\]
+.*: 64ef0400 fmls z0\.d, z0\.d, z15\.d\[0\]
+.*: 64f00400 fmls z0\.d, z0\.d, z0\.d\[1\]
+.*: 64f00400 fmls z0\.d, z0\.d, z0\.d\[1\]
+.*: 64fb0400 fmls z0\.d, z0\.d, z11\.d\[1\]
+.*: 64fb0400 fmls z0\.d, z0\.d, z11\.d\[1\]
+.*: 6560a000 fmsb z0\.h, p0/m, z0\.h, z0\.h
+.*: 6560a000 fmsb z0\.h, p0/m, z0\.h, z0\.h
+.*: 6560a001 fmsb z1\.h, p0/m, z0\.h, z0\.h
+.*: 6560a001 fmsb z1\.h, p0/m, z0\.h, z0\.h
+.*: 6560a01f fmsb z31\.h, p0/m, z0\.h, z0\.h
+.*: 6560a01f fmsb z31\.h, p0/m, z0\.h, z0\.h
+.*: 6560a800 fmsb z0\.h, p2/m, z0\.h, z0\.h
+.*: 6560a800 fmsb z0\.h, p2/m, z0\.h, z0\.h
+.*: 6560bc00 fmsb z0\.h, p7/m, z0\.h, z0\.h
+.*: 6560bc00 fmsb z0\.h, p7/m, z0\.h, z0\.h
+.*: 6560a060 fmsb z0\.h, p0/m, z3\.h, z0\.h
+.*: 6560a060 fmsb z0\.h, p0/m, z3\.h, z0\.h
+.*: 6560a3e0 fmsb z0\.h, p0/m, z31\.h, z0\.h
+.*: 6560a3e0 fmsb z0\.h, p0/m, z31\.h, z0\.h
+.*: 6564a000 fmsb z0\.h, p0/m, z0\.h, z4\.h
+.*: 6564a000 fmsb z0\.h, p0/m, z0\.h, z4\.h
+.*: 657fa000 fmsb z0\.h, p0/m, z0\.h, z31\.h
+.*: 657fa000 fmsb z0\.h, p0/m, z0\.h, z31\.h
.*: 65a0a000 fmsb z0\.s, p0/m, z0\.s, z0\.s
.*: 65a0a000 fmsb z0\.s, p0/m, z0\.s, z0\.s
.*: 65a0a001 fmsb z1\.s, p0/m, z0\.s, z0\.s
@@ -9716,6 +10910,20 @@ Disassembly of section .*:
.*: 65e4a000 fmsb z0\.d, p0/m, z0\.d, z4\.d
.*: 65ffa000 fmsb z0\.d, p0/m, z0\.d, z31\.d
.*: 65ffa000 fmsb z0\.d, p0/m, z0\.d, z31\.d
+.*: 65400800 fmul z0\.h, z0\.h, z0\.h
+.*: 65400800 fmul z0\.h, z0\.h, z0\.h
+.*: 65400801 fmul z1\.h, z0\.h, z0\.h
+.*: 65400801 fmul z1\.h, z0\.h, z0\.h
+.*: 6540081f fmul z31\.h, z0\.h, z0\.h
+.*: 6540081f fmul z31\.h, z0\.h, z0\.h
+.*: 65400840 fmul z0\.h, z2\.h, z0\.h
+.*: 65400840 fmul z0\.h, z2\.h, z0\.h
+.*: 65400be0 fmul z0\.h, z31\.h, z0\.h
+.*: 65400be0 fmul z0\.h, z31\.h, z0\.h
+.*: 65430800 fmul z0\.h, z0\.h, z3\.h
+.*: 65430800 fmul z0\.h, z0\.h, z3\.h
+.*: 655f0800 fmul z0\.h, z0\.h, z31\.h
+.*: 655f0800 fmul z0\.h, z0\.h, z31\.h
.*: 65800800 fmul z0\.s, z0\.s, z0\.s
.*: 65800800 fmul z0\.s, z0\.s, z0\.s
.*: 65800801 fmul z1\.s, z0\.s, z0\.s
@@ -9744,6 +10952,22 @@ Disassembly of section .*:
.*: 65c30800 fmul z0\.d, z0\.d, z3\.d
.*: 65df0800 fmul z0\.d, z0\.d, z31\.d
.*: 65df0800 fmul z0\.d, z0\.d, z31\.d
+.*: 65428000 fmul z0\.h, p0/m, z0\.h, z0\.h
+.*: 65428000 fmul z0\.h, p0/m, z0\.h, z0\.h
+.*: 65428001 fmul z1\.h, p0/m, z1\.h, z0\.h
+.*: 65428001 fmul z1\.h, p0/m, z1\.h, z0\.h
+.*: 6542801f fmul z31\.h, p0/m, z31\.h, z0\.h
+.*: 6542801f fmul z31\.h, p0/m, z31\.h, z0\.h
+.*: 65428800 fmul z0\.h, p2/m, z0\.h, z0\.h
+.*: 65428800 fmul z0\.h, p2/m, z0\.h, z0\.h
+.*: 65429c[...]
[diff truncated at 100000 bytes]