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[binutils-gdb/binutils-2_28-branch] sve
- From: Richard Sandiford <rsandifo at sourceware dot org>
- To: bfd-cvs at sourceware dot org
- Date: 27 Feb 2017 11:37:26 -0000
- Subject: [binutils-gdb/binutils-2_28-branch] sve
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=111ebbf920b1f112f24af4cda9102668201b1521
commit 111ebbf920b1f112f24af4cda9102668201b1521
Author: Richard Sandiford <richard.sandiford@arm.com>
Date: Mon Feb 27 11:34:39 2017 +0000
sve
[AArch64] Fix +sve documentation
The documentation entry for the SVE feature incorrectly said that
it was enabled by default for ARMv8-A or later. This patch fixes
that and also mentions that +sve implies +simd. (It also implies
+fp, but that follows by transitivity.)
gas/
* doc/c-aarch64.texi: Fix sve entry.
Diff:
---
gas/ChangeLog | 4 ++++
gas/doc/c-aarch64.texi | 4 ++--
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 2dd944d..02ecf37 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,7 @@
+2017-02-27 Richard Sandiford <richard.sandiford@arm.com>
+
+ * doc/c-aarch64.texi: Fix sve entry.
+
2017-02-27 Szabolcs Nagy <szabolcs.nagy@arm.com>
* config/tc-aarch64.c (aarch64_features): Add rcpc.
diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi
index 618f300..59467c5 100644
--- a/gas/doc/c-aarch64.texi
+++ b/gas/doc/c-aarch64.texi
@@ -155,8 +155,8 @@ automatically cause those extensions to be disabled.
@tab Enable ARMv8.1 Advanced SIMD extensions. This implies @code{simd}.
@item @code{simd} @tab ARMv8-A @tab ARMv8-A or later
@tab Enable Advanced SIMD extensions. This implies @code{fp}.
-@item @code{sve} @tab ARMv8-A @tab ARMv8-A or later
- @tab Enable the Scalable Vector Extensions.
+@item @code{sve} @tab ARMv8-A @tab No
+ @tab Enable the Scalable Vector Extensions. This implies @code{simd}.
@end multitable
@node AArch64 Syntax