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[binutils-gdb] [AArch64] PR target/20667, fix disassembler for the "special" optional SYS_Rt operand for "ic"/"tlbi
- From: Jiong Wang <jiwang at sourceware dot org>
- To: bfd-cvs at sourceware dot org
- Date: 7 Oct 2016 09:56:58 -0000
- Subject: [binutils-gdb] [AArch64] PR target/20667, fix disassembler for the "special" optional SYS_Rt operand for "ic"/"tlbi
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=362c0c4d9cc9f320d1e85755404879a13ebed91a
commit 362c0c4d9cc9f320d1e85755404879a13ebed91a
Author: Jiong Wang <jiong.wang@arm.com>
Date: Fri Oct 7 10:55:56 2016 +0100
[AArch64] PR target/20667, fix disassembler for the "special" optional SYS_Rt operand for "ic"/"tlbi"
gas/
PR target/20667
* testsuite/gas/aarch64/sys-rt-reg.s: Test source for instructions
using SYS_Rt reg.
* testsuite/gas/aarch64/sys-rt-reg.d: New testcase.
opcodes/
PR target/20667
* aarch64-opc.c (aarch64_print_operand): Always print operand if
it's available.
Diff:
---
gas/ChangeLog | 7 ++
gas/testsuite/gas/aarch64/sys-rt-reg.d | 134 +++++++++++++++++++++++++++++++++
gas/testsuite/gas/aarch64/sys-rt-reg.s | 21 ++++++
opcodes/ChangeLog | 6 ++
opcodes/aarch64-opc.c | 12 ++-
5 files changed, 176 insertions(+), 4 deletions(-)
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 29b9cf6..70b4af4 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,10 @@
+2016-10-07 Jiong Wang <jiong.wang@arm.com>
+
+ PR target/20667
+ * testsuite/gas/aarch64/sys-rt-reg.s: Test source for instructions using
+ SYS_Rt reg.
+ * testsuite/gas/aarch64/sys-rt-reg.d: New testcase.
+
2016-10-06 Claudiu Zissulescu <claziss@synopsys.com>
* testsuite/gas/arc/leave_enter.d: New file.
diff --git a/gas/testsuite/gas/aarch64/sys-rt-reg.d b/gas/testsuite/gas/aarch64/sys-rt-reg.d
new file mode 100644
index 0000000..4cca4f7
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sys-rt-reg.d
@@ -0,0 +1,134 @@
+#objdump: -dr
+
+.*: file format .*
+
+Disassembly of section \.text:
+
+.* <.*>:
+.*: d508711f ic ialluis
+.*: d508751f ic iallu
+.*: d50b7520 ic ivau, x0
+.*: d50b7523 ic ivau, x3
+.*: d50b752f ic ivau, x15
+.*: d50b753a ic ivau, x26
+.*: d50b753f ic ivau, xzr
+.*: d508871f tlbi vmalle1
+.*: d508831f tlbi vmalle1is
+.*: d50c87df tlbi vmalls12e1
+.*: d50c83df tlbi vmalls12e1is
+.*: d50c871f tlbi alle2
+.*: d50c831f tlbi alle2is
+.*: d50c879f tlbi alle1
+.*: d50c839f tlbi alle1is
+.*: d50e871f tlbi alle3
+.*: d50e831f tlbi alle3is
+.*: d5088720 tlbi vae1, x0
+.*: d5088723 tlbi vae1, x3
+.*: d508872f tlbi vae1, x15
+.*: d508873a tlbi vae1, x26
+.*: d508873f tlbi vae1, xzr
+.*: d5088740 tlbi aside1, x0
+.*: d5088743 tlbi aside1, x3
+.*: d508874f tlbi aside1, x15
+.*: d508875a tlbi aside1, x26
+.*: d508875f tlbi aside1, xzr
+.*: d5088760 tlbi vaae1, x0
+.*: d5088763 tlbi vaae1, x3
+.*: d508876f tlbi vaae1, x15
+.*: d508877a tlbi vaae1, x26
+.*: d508877f tlbi vaae1, xzr
+.*: d5088320 tlbi vae1is, x0
+.*: d5088323 tlbi vae1is, x3
+.*: d508832f tlbi vae1is, x15
+.*: d508833a tlbi vae1is, x26
+.*: d508833f tlbi vae1is, xzr
+.*: d5088340 tlbi aside1is, x0
+.*: d5088343 tlbi aside1is, x3
+.*: d508834f tlbi aside1is, x15
+.*: d508835a tlbi aside1is, x26
+.*: d508835f tlbi aside1is, xzr
+.*: d5088360 tlbi vaae1is, x0
+.*: d5088363 tlbi vaae1is, x3
+.*: d508836f tlbi vaae1is, x15
+.*: d508837a tlbi vaae1is, x26
+.*: d508837f tlbi vaae1is, xzr
+.*: d50c8020 tlbi ipas2e1is, x0
+.*: d50c8023 tlbi ipas2e1is, x3
+.*: d50c802f tlbi ipas2e1is, x15
+.*: d50c803a tlbi ipas2e1is, x26
+.*: d50c803f tlbi ipas2e1is, xzr
+.*: d50c80a0 tlbi ipas2le1is, x0
+.*: d50c80a3 tlbi ipas2le1is, x3
+.*: d50c80af tlbi ipas2le1is, x15
+.*: d50c80ba tlbi ipas2le1is, x26
+.*: d50c80bf tlbi ipas2le1is, xzr
+.*: d50c8420 tlbi ipas2e1, x0
+.*: d50c8423 tlbi ipas2e1, x3
+.*: d50c842f tlbi ipas2e1, x15
+.*: d50c843a tlbi ipas2e1, x26
+.*: d50c843f tlbi ipas2e1, xzr
+.*: d50c84a0 tlbi ipas2le1, x0
+.*: d50c84a3 tlbi ipas2le1, x3
+.*: d50c84af tlbi ipas2le1, x15
+.*: d50c84ba tlbi ipas2le1, x26
+.*: d50c84bf tlbi ipas2le1, xzr
+.*: d50c8720 tlbi vae2, x0
+.*: d50c8723 tlbi vae2, x3
+.*: d50c872f tlbi vae2, x15
+.*: d50c873a tlbi vae2, x26
+.*: d50c873f tlbi vae2, xzr
+.*: d50c8320 tlbi vae2is, x0
+.*: d50c8323 tlbi vae2is, x3
+.*: d50c832f tlbi vae2is, x15
+.*: d50c833a tlbi vae2is, x26
+.*: d50c833f tlbi vae2is, xzr
+.*: d50e8720 tlbi vae3, x0
+.*: d50e8723 tlbi vae3, x3
+.*: d50e872f tlbi vae3, x15
+.*: d50e873a tlbi vae3, x26
+.*: d50e873f tlbi vae3, xzr
+.*: d50e8320 tlbi vae3is, x0
+.*: d50e8323 tlbi vae3is, x3
+.*: d50e832f tlbi vae3is, x15
+.*: d50e833a tlbi vae3is, x26
+.*: d50e833f tlbi vae3is, xzr
+.*: d50883a0 tlbi vale1is, x0
+.*: d50883a3 tlbi vale1is, x3
+.*: d50883af tlbi vale1is, x15
+.*: d50883ba tlbi vale1is, x26
+.*: d50883bf tlbi vale1is, xzr
+.*: d50c83a0 tlbi vale2is, x0
+.*: d50c83a3 tlbi vale2is, x3
+.*: d50c83af tlbi vale2is, x15
+.*: d50c83ba tlbi vale2is, x26
+.*: d50c83bf tlbi vale2is, xzr
+.*: d50e83a0 tlbi vale3is, x0
+.*: d50e83a3 tlbi vale3is, x3
+.*: d50e83af tlbi vale3is, x15
+.*: d50e83ba tlbi vale3is, x26
+.*: d50e83bf tlbi vale3is, xzr
+.*: d50883e0 tlbi vaale1is, x0
+.*: d50883e3 tlbi vaale1is, x3
+.*: d50883ef tlbi vaale1is, x15
+.*: d50883fa tlbi vaale1is, x26
+.*: d50883ff tlbi vaale1is, xzr
+.*: d50887a0 tlbi vale1, x0
+.*: d50887a3 tlbi vale1, x3
+.*: d50887af tlbi vale1, x15
+.*: d50887ba tlbi vale1, x26
+.*: d50887bf tlbi vale1, xzr
+.*: d50c87a0 tlbi vale2, x0
+.*: d50c87a3 tlbi vale2, x3
+.*: d50c87af tlbi vale2, x15
+.*: d50c87ba tlbi vale2, x26
+.*: d50c87bf tlbi vale2, xzr
+.*: d50e87a0 tlbi vale3, x0
+.*: d50e87a3 tlbi vale3, x3
+.*: d50e87af tlbi vale3, x15
+.*: d50e87ba tlbi vale3, x26
+.*: d50e87bf tlbi vale3, xzr
+.*: d50887e0 tlbi vaale1, x0
+.*: d50887e3 tlbi vaale1, x3
+.*: d50887ef tlbi vaale1, x15
+.*: d50887fa tlbi vaale1, x26
+.*: d50887ff tlbi vaale1, xzr
diff --git a/gas/testsuite/gas/aarch64/sys-rt-reg.s b/gas/testsuite/gas/aarch64/sys-rt-reg.s
new file mode 100644
index 0000000..c5f5a70
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sys-rt-reg.s
@@ -0,0 +1,21 @@
+// sys-rt-reg.s Test file for AArch64 instructions take SYS_Rt register.
+
+ .text
+
+ .irp ic_op, ialluis, iallu
+ ic \ic_op
+ .endr
+
+ .irp rt, x0, x3, x15, x26, xzr
+ ic ivau, \rt
+ .endr
+
+ .irp tlbi_op, vmalle1, vmalle1is, vmalls12e1, vmalls12e1is, alle2, alle2is, alle1, alle1is, alle3, alle3is
+ tlbi \tlbi_op
+ .endr
+
+ .irp tlbi_op, vae1, aside1, vaae1, vae1is, aside1is, vaae1is, ipas2e1is, ipas2le1is, ipas2e1, ipas2le1, vae2, vae2is, vae3, vae3is, vale1is, vale2is, vale3is, vaale1is, vale1, vale2, vale3, vaale1
+ .irp rt, x0, x3, x15, x26, xzr
+ tlbi \tlbi_op, \rt
+ .endr
+ .endr
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 22ec46b..65cf0d7 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,9 @@
+2016-10-07 Jiong Wang <jiong.wang@arm.com>
+
+ PR target/20667
+ * aarch64-opc.c (aarch64_print_operand): Always print operand if it's
+ available.
+
2016-10-07 Alan Modra <amodra@gmail.com>
* sh-opc.h (sh_merge_bfd_arch): Delete prototype.
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index 4b1411f..333be5a 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -2970,11 +2970,15 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
/* The optional-ness of <Xt> in e.g. IC <ic_op>{, <Xt>} is determined by
the <ic_op>, therefore we we use opnd->present to override the
generic optional-ness information. */
- if (opnd->type == AARCH64_OPND_Rt_SYS && !opnd->present)
- break;
+ if (opnd->type == AARCH64_OPND_Rt_SYS)
+ {
+ if (!opnd->present)
+ break;
+ }
/* Omit the operand, e.g. RET. */
- if (optional_operand_p (opcode, idx)
- && opnd->reg.regno == get_optional_operand_default_value (opcode))
+ else if (optional_operand_p (opcode, idx)
+ && (opnd->reg.regno
+ == get_optional_operand_default_value (opcode)))
break;
assert (opnd->qualifier == AARCH64_OPND_QLF_W
|| opnd->qualifier == AARCH64_OPND_QLF_X);