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[binutils-gdb/binutils-2_26-branch] Don't use vec_disp8 encoding with the .d32 suffix
- From: H.J.Lu <hjl at sourceware dot org>
- To: bfd-cvs at sourceware dot org
- Date: 15 Apr 2016 13:25:21 -0000
- Subject: [binutils-gdb/binutils-2_26-branch] Don't use vec_disp8 encoding with the .d32 suffix
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=cd59d24ee1480b5cce2fcb2ca21c7ea055c6d8e4
commit cd59d24ee1480b5cce2fcb2ca21c7ea055c6d8e4
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Fri Apr 15 06:01:31 2016 -0700
Don't use vec_disp8 encoding with the .d32 suffix
Since the .d32 suffix prefers 32-bit displacement in encoding, try
vec_disp8 encoding only if i.disp_encoding != disp_encoding_32bit.
Backport from master
PR gas/19909
* config/tc-i386.c (check_VecOperands): Try vec_disp8 encoding
only if i.disp_encoding != disp_encoding_32bit.
* gas/testsuite/gas/i386/disp32.s: Add tests for vmovdqu64.d32.
* gas/testsuite/gas/i386/x86-64-disp32.s: Likewise.
* gas/testsuite/gas/i386/disp32.d: Updated.
* gas/testsuite/gas/i386/x86-64-disp32.d: Likewise.
Diff:
---
gas/ChangeLog | 13 +++++++++++++
gas/config/tc-i386.c | 4 +++-
gas/testsuite/gas/i386/disp32.d | 10 ++++++----
gas/testsuite/gas/i386/disp32.s | 4 ++++
gas/testsuite/gas/i386/x86-64-disp32.d | 10 ++++++----
gas/testsuite/gas/i386/x86-64-disp32.s | 3 +++
6 files changed, 35 insertions(+), 9 deletions(-)
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 96a8822..ae27fd0 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,16 @@
+2016-04-15 H.J. Lu <hongjiu.lu@intel.com>
+
+ Backport from master
+ 2016-04-04 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/19909
+ * config/tc-i386.c (check_VecOperands): Try vec_disp8 encoding
+ only if i.disp_encoding != disp_encoding_32bit.
+ * gas/testsuite/gas/i386/disp32.s: Add tests for vmovdqu64.d32.
+ * gas/testsuite/gas/i386/x86-64-disp32.s: Likewise.
+ * gas/testsuite/gas/i386/disp32.d: Updated.
+ * gas/testsuite/gas/i386/x86-64-disp32.d: Likewise.
+
2016-02-20 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 8676c5f..664f381 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -4564,7 +4564,9 @@ check_VecOperands (const insn_template *t)
&& i.op[op].disps->X_op == O_constant)
{
offsetT value = i.op[op].disps->X_add_number;
- int vec_disp8_ok = fits_in_vec_disp8 (value);
+ int vec_disp8_ok
+ = (i.disp_encoding != disp_encoding_32bit
+ && fits_in_vec_disp8 (value));
if (t->operand_types [op].bitfield.vec_disp8)
{
if (vec_disp8_ok)
diff --git a/gas/testsuite/gas/i386/disp32.d b/gas/testsuite/gas/i386/disp32.d
index a3255fa..24ada81 100644
--- a/gas/testsuite/gas/i386/disp32.d
+++ b/gas/testsuite/gas/i386/disp32.d
@@ -15,11 +15,12 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 8b 98 ff 0f 00 00 mov 0xfff\(%eax\),%ebx
[ ]*[a-f0-9]+: 8b 98 00 00 00 00 mov 0x0\(%eax\),%ebx
[ ]*[a-f0-9]+: 8b 98 03 00 00 00 mov 0x3\(%eax\),%ebx
-[ ]*[a-f0-9]+: eb 07 jmp 26 <foo>
-[ ]*[a-f0-9]+: eb 05 jmp 26 <foo>
-[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 26 <foo>
+[ ]*[a-f0-9]+: 62 f1 fe 08 6f 98 c0 ff ff ff vmovdqu64 -0x40\(%eax\),%xmm3
+[ ]*[a-f0-9]+: eb 07 jmp 30 <foo>
+[ ]*[a-f0-9]+: eb 05 jmp 30 <foo>
+[ ]*[a-f0-9]+: e9 00 00 00 00 jmp 30 <foo>
-0+26 <foo>:
+0+30 <foo>:
[ ]*[a-f0-9]+: 89 18 mov %ebx,\(%eax\)
[ ]*[a-f0-9]+: 89 58 03 mov %ebx,0x3\(%eax\)
[ ]*[a-f0-9]+: 89 98 ff 0f 00 00 mov %ebx,0xfff\(%eax\)
@@ -27,4 +28,5 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 89 58 03 mov %ebx,0x3\(%eax\)
[ ]*[a-f0-9]+: 89 98 00 00 00 00 mov %ebx,0x0\(%eax\)
[ ]*[a-f0-9]+: 89 98 03 00 00 00 mov %ebx,0x3\(%eax\)
+[ ]*[a-f0-9]+: 62 f1 fe 08 6f 98 c0 ff ff ff vmovdqu64 -0x40\(%eax\),%xmm3
#pass
diff --git a/gas/testsuite/gas/i386/disp32.s b/gas/testsuite/gas/i386/disp32.s
index c3bec3a..fa85ae5 100644
--- a/gas/testsuite/gas/i386/disp32.s
+++ b/gas/testsuite/gas/i386/disp32.s
@@ -9,6 +9,8 @@
mov.d32 (%eax),%ebx
mov.d32 3(%eax),%ebx
+ vmovdqu64.d32 -0x40(%eax),%xmm3
+
jmp foo
jmp.d8 foo
jmp.d32 foo
@@ -24,3 +26,5 @@ foo:
mov.d32 DWORD PTR [eax], ebx
mov.d32 DWORD PTR [eax+3], ebx
+
+ vmovdqu64.d32 xmm3,XMMWORD PTR [eax-0x40]
diff --git a/gas/testsuite/gas/i386/x86-64-disp32.d b/gas/testsuite/gas/i386/x86-64-disp32.d
index 8e307ee..da5dcb0 100644
--- a/gas/testsuite/gas/i386/x86-64-disp32.d
+++ b/gas/testsuite/gas/i386/x86-64-disp32.d
@@ -15,11 +15,12 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 8b 98 ff 0f 00 00 mov 0xfff\(%rax\),%ebx
[ ]*[a-f0-9]+: 8b 98 00 00 00 00 mov 0x0\(%rax\),%ebx
[ ]*[a-f0-9]+: 8b 98 03 00 00 00 mov 0x3\(%rax\),%ebx
-[ ]*[a-f0-9]+: eb 07 jmp 26 <foo>
-[ ]*[a-f0-9]+: eb 05 jmp 26 <foo>
-[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 26 <foo>
+[ ]*[a-f0-9]+: 62 f1 fe 08 6f 98 c0 ff ff ff vmovdqu64 -0x40\(%rax\),%xmm3
+[ ]*[a-f0-9]+: eb 07 jmp 30 <foo>
+[ ]*[a-f0-9]+: eb 05 jmp 30 <foo>
+[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 30 <foo>
-0+26 <foo>:
+0+30 <foo>:
[ ]*[a-f0-9]+: 89 18 mov %ebx,\(%rax\)
[ ]*[a-f0-9]+: 89 58 03 mov %ebx,0x3\(%rax\)
[ ]*[a-f0-9]+: 89 98 ff 0f 00 00 mov %ebx,0xfff\(%rax\)
@@ -27,4 +28,5 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 89 58 03 mov %ebx,0x3\(%rax\)
[ ]*[a-f0-9]+: 89 98 00 00 00 00 mov %ebx,0x0\(%rax\)
[ ]*[a-f0-9]+: 89 98 03 00 00 00 mov %ebx,0x3\(%rax\)
+[ ]*[a-f0-9]+: 62 f1 fe 08 6f 98 c0 ff ff ff vmovdqu64 -0x40\(%rax\),%xmm3
#pass
diff --git a/gas/testsuite/gas/i386/x86-64-disp32.s b/gas/testsuite/gas/i386/x86-64-disp32.s
index 0856339..e00aa02 100644
--- a/gas/testsuite/gas/i386/x86-64-disp32.s
+++ b/gas/testsuite/gas/i386/x86-64-disp32.s
@@ -8,6 +8,7 @@
mov.d32 (%rax),%ebx
mov.d32 3(%rax),%ebx
+ vmovdqu64.d32 -0x40(%rax),%xmm3
jmp foo
jmp.d8 foo
@@ -24,3 +25,5 @@ foo:
mov.d32 DWORD PTR [rax], ebx
mov.d32 DWORD PTR [rax+3], ebx
+
+ vmovdqu64.d32 xmm3,XMMWORD PTR [rax-0x40]