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[binutils-gdb] Fix the disassembly of the AArch64's OOR instruction as a MOV instruction.
- From: Nick Clifton <nickc at sourceware dot org>
- To: bfd-cvs at sourceware dot org
- Date: 18 Mar 2016 17:04:26 -0000
- Subject: [binutils-gdb] Fix the disassembly of the AArch64's OOR instruction as a MOV instruction.
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=8678914fcb40e4c620a33e6b38a14df928fa780a
commit 8678914fcb40e4c620a33e6b38a14df928fa780a
Author: Nick Clifton <nickc@redhat.com>
Date: Fri Mar 18 17:02:20 2016 +0000
Fix the disassembly of the AArch64's OOR instruction as a MOV instruction.
PR target/19721
opcodes * aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
of MOV insn that aliases an ORR insn.
gas * testsuite/gas/aarch64/pr19721.s: New test source file.
* testsuite/gas/aarch64/pr19721.d: New test driver file.
Diff:
---
gas/ChangeLog | 4 ++++
gas/testsuite/gas/aarch64/pr19721.d | 10 ++++++++++
gas/testsuite/gas/aarch64/pr19721.s | 5 +++++
opcodes/ChangeLog | 6 ++++++
opcodes/aarch64-tbl.h | 2 +-
5 files changed, 26 insertions(+), 1 deletion(-)
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 5f362ca..967b23b 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,9 @@
2016-03-18 Nick Clifton <nickc@redhat.com>
+ PR target/19721
+ * testsuite/gas/aarch64/pr19721.s: New test source file.
+ * testsuite/gas/aarch64/pr19721.d: New test driver file.
+
* doc/as.texinfo: Place the target specific command line options
into their own man page section.
diff --git a/gas/testsuite/gas/aarch64/pr19721.d b/gas/testsuite/gas/aarch64/pr19721.d
new file mode 100644
index 0000000..a621ae5
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/pr19721.d
@@ -0,0 +1,10 @@
+#objdump: -d
+
+.*: file format .*
+
+Disassembly of section \.text:
+
+0+000 <.*>:
+ 0: aa1103e7 mov x7, x17
+ 4: aa1167e7 mov x7, x17, lsl #25
+ 8: aa1167e7 mov x7, x17, lsl #25
diff --git a/gas/testsuite/gas/aarch64/pr19721.s b/gas/testsuite/gas/aarch64/pr19721.s
new file mode 100644
index 0000000..cda068a
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/pr19721.s
@@ -0,0 +1,5 @@
+ .text
+
+ mov x7, x17
+ mov x7, x17, lsl 25
+ orr x7, xzr, x17, lsl 25
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 0474fce..7a673e3 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,9 @@
+2016-03-18 Nick Clifton <nickc@redhat.com>
+
+ PR target/19721
+ * aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
+ of MOV insn that aliases an ORR insn.
+
2016-03-16 Jiong Wang <jiong.wang@arm.com>
* arm-dis.c (neon_opcodes): Support new FP16 instructions.
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index 66a0cae..872e3d1 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -2547,7 +2547,7 @@ struct aarch64_opcode aarch64_opcode_table[] =
{"and", 0xa000000, 0x7f200000, log_shift, 0, CORE, OP3 (Rd, Rn, Rm_SFT), QL_I3SAMER, F_SF},
{"bic", 0xa200000, 0x7f200000, log_shift, 0, CORE, OP3 (Rd, Rn, Rm_SFT), QL_I3SAMER, F_SF},
{"orr", 0x2a000000, 0x7f200000, log_shift, 0, CORE, OP3 (Rd, Rn, Rm_SFT), QL_I3SAMER, F_HAS_ALIAS | F_SF},
- {"mov", 0x2a0003e0, 0x7f2003e0, log_shift, 0, CORE, OP2 (Rd, Rm), QL_I2SAMER, F_ALIAS | F_SF},
+ {"mov", 0x2a0003e0, 0x7f2003e0, log_shift, 0, CORE, OP2 (Rd, Rm_SFT), QL_I2SAMER, F_ALIAS | F_SF},
{"uxtw", 0x2a0003e0, 0x7f2003e0, log_shift, OP_UXTW, CORE, OP2 (Rd, Rm), QL_I2SAMEW, F_ALIAS | F_PSEUDO},
{"orn", 0x2a200000, 0x7f200000, log_shift, 0, CORE, OP3 (Rd, Rn, Rm_SFT), QL_I3SAMER, F_HAS_ALIAS | F_SF},
{"mvn", 0x2a2003e0, 0x7f2003e0, log_shift, 0, CORE, OP2 (Rd, Rm_SFT), QL_I2SAMER, F_ALIAS | F_SF},