This is the mail archive of the
binutils-cvs@sourceware.org
mailing list for the binutils project.
[binutils-gdb/binutils-2_26-branch] [AArch64] Add feature flags and command line for ARMv8.2 FP16 support.
- From: Matthew Wahab <mwahab at sourceware dot org>
- To: bfd-cvs at sourceware dot org
- Date: 14 Dec 2015 13:30:27 -0000
- Subject: [binutils-gdb/binutils-2_26-branch] [AArch64] Add feature flags and command line for ARMv8.2 FP16 support.
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=28a73c5c3dd551e346f3bbbb992840e2f5d6fc9e
commit 28a73c5c3dd551e346f3bbbb992840e2f5d6fc9e
Author: Matthew Wahab <matthew.wahab@arm.com>
Date: Fri Nov 27 13:19:50 2015 +0000
[AArch64] Add feature flags and command line for ARMv8.2 FP16 support.
ARMv8.2 adds optional support for 16-bit operations to the FP and
Adv.SIMD instructions. This patch adds a feature macro for this support
with a new command line option "+fp16" to enable/disable it.
Although the command line option is added as an architecture extension,
it only affects instructions available with when +fp or +simd is
enabled. If +fp16 is specified then it will also enable +fp.
There are currently no FP16 instructions implemented in binutils, this
patch is to enable subsequent work on supporting the extension.
gas/
2015-11-27 Matthew Wahab <matthew.wahab@arm.com>
* config/tc-aarch64.c (aarch64_features): Add "fp16".
* doc/c-aarch64.texi (Architecture Extensions): Add "fp16".
include/opcode/
2015-11-27 Matthew Wahab <matthew.wahab@arm.com>
* aarch64.h (AARCH64_FEATURE_F16): New.
(AARCH64_ARCH_V8_2): Add AARCH64_FEATURE_F16 to ARMv8.2
features.
Change-Id: If516ab7cb2ebf134b499b453bdb8639078ac024c
Diff:
---
gas/ChangeLog | 5 +++++
gas/config/tc-aarch64.c | 2 ++
gas/doc/c-aarch64.texi | 3 +++
include/opcode/ChangeLog | 6 ++++++
include/opcode/aarch64.h | 2 ++
5 files changed, 18 insertions(+)
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 0710482..3c9a30d 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2015-12-14 Matthew Wahab <matthew.wahab@arm.com>
+
+ * config/tc-aarch64.c (aarch64_features): Add "fp16".
+ * doc/c-aarch64.texi (Architecture Extensions): Add "fp16".
+
2015-12-09 Matthew Wahab <matthew.wahab@arm.com>
* config/tc-aarch64.c (aarch64_archs): Add "armv8.2-a".
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 0fd6443..d306710 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -7738,6 +7738,8 @@ static const struct aarch64_option_cpu_value_table aarch64_features[] = {
{"lor", AARCH64_FEATURE (AARCH64_FEATURE_LOR, 0)},
{"rdma", AARCH64_FEATURE (AARCH64_FEATURE_SIMD
| AARCH64_FEATURE_RDMA, 0)},
+ {"fp16", AARCH64_FEATURE (AARCH64_FEATURE_F16
+ | AARCH64_FEATURE_FP, 0)},
{NULL, AARCH64_ARCH_NONE}
};
diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi
index bfd41c3..2717af2 100644
--- a/gas/doc/c-aarch64.texi
+++ b/gas/doc/c-aarch64.texi
@@ -142,6 +142,9 @@ automatically cause those extensions to be disabled.
@tab Enable Limited Ordering Regions extensions.
@item @code{rdma} @tab ARMv8-A @tab ARMv8-A or later
@tab Enable ARMv8.1 Advanced SIMD extensions. This implies @code{simd}.
+@item @code{fp16} @tab ARMv8.2-A @tab ARMv8.2-A or later
+ @tab Enable ARMv8.2 16-bit floating-point support. This implies
+ @code{fp}.
@end multitable
@node AArch64 Syntax
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index ccd3479..fc766ff 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,5 +1,11 @@
2015-12-14 Matthew Wahab <matthew.wahab@arm.com>
+ * aarch64.h (AARCH64_FEATURE_F16): New.
+ (AARCH64_ARCH_V8_2): Add AARCH64_FEATURE_F16 to ARMv8.2
+ features.
+
+2015-12-14 Matthew Wahab <matthew.wahab@arm.com>
+
* aarch64.h (aarch64_op): Add OP_BFC.
2015-12-09 Matthew Wahab <matthew.wahab@arm.com>
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index 996ed85..f1658bc 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -48,6 +48,7 @@ typedef uint32_t aarch64_insn;
#define AARCH64_FEATURE_LOR 0x00400000 /* LOR instructions. */
#define AARCH64_FEATURE_RDMA 0x00800000 /* v8.1 SIMD instructions. */
#define AARCH64_FEATURE_V8_1 0x01000000 /* v8.1 features. */
+#define AARCH64_FEATURE_F16 0x01000000 /* v8.2 FP16 instructions. */
/* Architectures are the sum of the base and extensions. */
#define AARCH64_ARCH_V8 AARCH64_FEATURE (AARCH64_FEATURE_V8, \
@@ -63,6 +64,7 @@ typedef uint32_t aarch64_insn;
| AARCH64_FEATURE_RDMA)
#define AARCH64_ARCH_V8_2 AARCH64_FEATURE (AARCH64_FEATURE_V8, \
AARCH64_FEATURE_V8_2 \
+ | AARCH64_FEATURE_F16 \
| AARCH64_FEATURE_FP \
| AARCH64_FEATURE_SIMD \
| AARCH64_FEATURE_LSE \