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[binutils-gdb] Add -march=interaptiv


https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=77403ce9669d35b286b3ca75fdc1e4c61f36b59a

commit 77403ce9669d35b286b3ca75fdc1e4c61f36b59a
Author: Robert Suchanek <robert.suchanek@imgtec.com>
Date:   Tue Jul 28 11:26:31 2015 +0100

    Add -march=interaptiv
    
    gas/
    
    	* config/tc-mips.c (mips_cpu_info_table): Add interaptiv entry.
    	* doc/c-mips.text: Document -march=interaptiv.

Diff:
---
 gas/ChangeLog        | 5 +++++
 gas/config/tc-mips.c | 2 ++
 gas/doc/c-mips.texi  | 1 +
 3 files changed, 8 insertions(+)

diff --git a/gas/ChangeLog b/gas/ChangeLog
index b640a62..b0eb854 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2015-07-28  Robert Suchanek  <robert.suchanek@imgtec.com>
+
+	* config/tc-mips.c (mips_cpu_info_table): Add interaptiv entry.
+	* doc/c-mips.text: Document -march=interaptiv.
+
 2015-07-27  H.J. Lu  <hongjiu.lu@intel.com>
 
 	* configure: Regenerated.
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index f67fbd0..907fafd 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -18666,6 +18666,8 @@ static const struct mips_cpu_info mips_cpu_info_table[] =
   { "1004kf2_1",      0, ASE_DSP | ASE_MT,	ISA_MIPS32R2, CPU_MIPS32R2 },
   { "1004kf",         0, ASE_DSP | ASE_MT,	ISA_MIPS32R2, CPU_MIPS32R2 },
   { "1004kf1_1",      0, ASE_DSP | ASE_MT,	ISA_MIPS32R2, CPU_MIPS32R2 },
+  /* interaptiv is the new name for 1004kf */
+  { "interaptiv",     0, ASE_DSP | ASE_MT,	ISA_MIPS32R2, CPU_MIPS32R2 },
   /* P5600 with EVA and Virtualization ASEs, other ASEs are optional.  */
   { "p5600",          0, ASE_VIRT | ASE_EVA | ASE_XPA, 	ISA_MIPS32R5, CPU_MIPS32R5 },
 
diff --git a/gas/doc/c-mips.texi b/gas/doc/c-mips.texi
index f72db68..f2f80d5 100644
--- a/gas/doc/c-mips.texi
+++ b/gas/doc/c-mips.texi
@@ -369,6 +369,7 @@ m14kec,
 1004kf2_1,
 1004kf,
 1004kf1_1,
+interaptiv,
 p5600,
 5kc,
 5kf,


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