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src/opcodes ChangeLog i386-dis.c
- From: roland at sourceware dot org
- To: binutils-cvs at sourceware dot org
- Date: Fri, 11 Oct 2013 01:00:54 +0000
- Subject: src/opcodes ChangeLog i386-dis.c
CVSROOT: /cvs/src
Module name: src
Branch: binutils-2_24-branch
Changes by: roland@sourceware.org 2013-10-11 01:00:54
Modified files:
opcodes : ChangeLog i386-dis.c
Log message:
opcodes/
* i386-dis.c (oappend_maybe_intel): New function.
(OP_ST, OP_STi, append_seg, OP_I, OP_I64, OP_sI, OP_ESreg): Use it.
(OP_C, OP_T, CMP_Fixup, OP_EX_VexImmW): Likewise.
(VCMP_Fixup, VPCMP_Fixup, PCLMUL_Fixup): Likewise.
Patches:
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/ChangeLog.diff?cvsroot=src&only_with_tag=binutils-2_24-branch&r1=1.2022.2.3&r2=1.2022.2.4
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/i386-dis.c.diff?cvsroot=src&only_with_tag=binutils-2_24-branch&r1=1.280&r2=1.280.2.1