src gas/ChangeLog gas/config/tc-mips.c gas/doc ...

[macro at sourceware dot org]

CVSROOT:	/cvs/src
Module name:	src
Changes by:	macro@sourceware.org	2011-08-09 15:20:03

Modified files:
	gas            : ChangeLog 
	gas/config     : tc-mips.c 
	gas/doc        : as.texinfo c-mips.texi 
	gas/testsuite  : ChangeLog 
	gas/testsuite/gas/mips: mips.exp 
	include/opcode : ChangeLog mips.h 
	opcodes        : ChangeLog micromips-opc.c mips-dis.c mips-opc.c 
Added files:
	gas/testsuite/gas/mips: mcu.d mcu.s micromips@mcu.d 

Log message:
	gas/
	* config/tc-mips.c (mips_set_options): Add ase_mcu.
	(mips_opts): Initialise ase_mcu to -1.
	(ISA_SUPPORTS_MCU_ASE): New macro.
	(MIPS_CPU_ASE_MCU): Likewise.
	(is_opcode_valid): Handle MCU.
	(macro_build, macro): Likewise.
	(validate_mips_insn, validate_micromips_insn): Likewise.
	(mips_ip): Likewise.
	(options): Add OPTION_MCU and OPTION_NO_MCU.
	(md_longopts): Add mmcu and mno-mcu.
	(md_parse_option): Handle OPTION_MCU and OPTION_NO_MCU.
	(mips_after_parse_args): Handle MCU.
	(s_mipsset): Likewise.
	(md_show_usage): Handle MCU options.
	
	* doc/as.texinfo: Document -mmcu and -mno-mcu options.
	* doc/c-mips.texi: Likewise, and document ".set mcu" and
	".set nomcu" directives.
	
	gas/testsuite/
	* gas/mips/micromips@mcu.d: New test.
	* gas/mips/mcu.d: Likewise.
	* gas/mips/mcu.s: New test source.
	* gas/mips/mips.exp: Run the new tests.
	
	include/opcode/
	* mips.h (OP_MASK_3BITPOS, OP_SH_3BITPOS): New macros.
	(OP_MASK_OFFSET12, OP_SH_OFFSET12): Redefine.
	(INSN_ASE_MASK): Add the MCU bit.
	(INSN_MCU): New macro.
	(M_ACLR_AB, M_ACLR_OB, M_ASET_AB, M_ASET_OB): New enum values.
	(MICROMIPSOP_MASK_3BITPOS, MICROMIPSOP_SH_3BITPOS): New macros.
	
	opcodes/
	* mips-dis.c (mips_arch_choices): Enable MCU for "mips32r2"
	and "mips64r2".
	(print_insn_args, print_insn_micromips): Handle MCU.
	* micromips-opc.c (MC): New macro.
	(micromips_opcodes): Add "aclr", "aset" and "iret".
	* mips-opc.c (MC): New macro.
	(mips_builtin_opcodes): Add "aclr", "aset" and "iret".

Patches:
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/ChangeLog.diff?cvsroot=src&r1=1.4568&r2=1.4569
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/config/tc-mips.c.diff?cvsroot=src&r1=1.485&r2=1.486
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/doc/as.texinfo.diff?cvsroot=src&r1=1.239&r2=1.240
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/doc/c-mips.texi.diff?cvsroot=src&r1=1.59&r2=1.60
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/ChangeLog.diff?cvsroot=src&r1=1.1941&r2=1.1942
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/mips/mcu.d.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/mips/mcu.s.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/mips/micromips@mcu.d.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/mips/mips.exp.diff?cvsroot=src&r1=1.188&r2=1.189
http://sourceware.org/cgi-bin/cvsweb.cgi/src/include/opcode/ChangeLog.diff?cvsroot=src&r1=1.449&r2=1.450
http://sourceware.org/cgi-bin/cvsweb.cgi/src/include/opcode/mips.h.diff?cvsroot=src&r1=1.78&r2=1.79
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/ChangeLog.diff?cvsroot=src&r1=1.1750&r2=1.1751
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/micromips-opc.c.diff?cvsroot=src&r1=1.3&r2=1.4
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/mips-dis.c.diff?cvsroot=src&r1=1.85&r2=1.86
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/mips-opc.c.diff?cvsroot=src&r1=1.87&r2=1.88