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src bfd/ChangeLog bfd/aoutx.h bfd/archures.c b ...

CVSROOT:	/cvs/src
Module name:	src
Changes by:	ths@sourceware.org	2008-11-28 18:02:18

Modified files:
	bfd            : ChangeLog aoutx.h archures.c bfd-in2.h 
	                 cpu-mips.c elfxx-mips.c 
	gas            : ChangeLog 
	gas/config     : tc-mips.c 
	gas/doc        : c-mips.texi 
	include/opcode : ChangeLog mips.h 
	opcodes        : ChangeLog mips-dis.c 

Log message:
	* aoutx.h (NAME): Add case statements for bfd_mach_mips14000,
	bfd_mach_mips16000.
	* archures.c (bfd_architecture): Add .#defines for bfd_mach_mips14000,
	bfd_mach_mips16000.
	* bfd-in2.h: Regenerate.
	* cpu-mips.c: Add enums I_mips14000, I_mips16000.
	(arch_info_struct): Add refs to R14000, R16000.
	* elfxx-mips.c (mips_set_isa_flags): Handle bfd_mach_mips14000,
	bfd_mach_mips16000.
	(mips_mach_extensions): Map R14000, R16000 to R10000.
	
	* config/tc-mips.c (hilo_interlocks): Handle CPU_R14000, CPU_R16000.
	(mips_cpu_info_table): Add r14000, r16000.
	* doc/c-mips.texi: Add entries for 14000, 16000.
	
	* mips-dis.c (mips_arch_choices): Add r14000, r16000.
	
	* mips.h: Define CPU_R14000, CPU_R16000.
	(OPCODE_IS_MEMBER): Include R14000, R16000 in test.

Patches:
http://sourceware.org/cgi-bin/cvsweb.cgi/src/bfd/ChangeLog.diff?cvsroot=src&r1=1.4378&r2=1.4379
http://sourceware.org/cgi-bin/cvsweb.cgi/src/bfd/aoutx.h.diff?cvsroot=src&r1=1.72&r2=1.73
http://sourceware.org/cgi-bin/cvsweb.cgi/src/bfd/archures.c.diff?cvsroot=src&r1=1.132&r2=1.133
http://sourceware.org/cgi-bin/cvsweb.cgi/src/bfd/bfd-in2.h.diff?cvsroot=src&r1=1.457&r2=1.458
http://sourceware.org/cgi-bin/cvsweb.cgi/src/bfd/cpu-mips.c.diff?cvsroot=src&r1=1.29&r2=1.30
http://sourceware.org/cgi-bin/cvsweb.cgi/src/bfd/elfxx-mips.c.diff?cvsroot=src&r1=1.250&r2=1.251
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/ChangeLog.diff?cvsroot=src&r1=1.3681&r2=1.3682
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/config/tc-mips.c.diff?cvsroot=src&r1=1.398&r2=1.399
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/doc/c-mips.texi.diff?cvsroot=src&r1=1.45&r2=1.46
http://sourceware.org/cgi-bin/cvsweb.cgi/src/include/opcode/ChangeLog.diff?cvsroot=src&r1=1.372&r2=1.373
http://sourceware.org/cgi-bin/cvsweb.cgi/src/include/opcode/mips.h.diff?cvsroot=src&r1=1.60&r2=1.61
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/ChangeLog.diff?cvsroot=src&r1=1.1319&r2=1.1320
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/mips-dis.c.diff?cvsroot=src&r1=1.75&r2=1.76
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