src bfd/archures.c bfd/bfd-in2.h bfd/cpu-arm.c ...

[jsm28 at sourceware dot org]

CVSROOT:	/cvs/src
Module name:	src
Branch: 	binutils-csl-2_17-branch
Changes by:	jsm28@sourceware.org	2006-09-19 18:44:37

Modified files:
	bfd            : archures.c bfd-in2.h cpu-arm.c 
	gas/config     : tc-arm.c 
	include/opcode : arm.h 
	opcodes        : arm-dis.c 
Added files:
	gas/testsuite/gas/arm: iwmmxt2.d iwmmxt2.s 

Log message:
	2006-09-19  Mark Shinwell  <shinwell@codesourcery.com>
	Joseph Myers  <joseph@codesourcery.com>
	Ian Lance Taylor  <ian@wasabisystems.com>
	Ben Elliston  <bje@wasabisystems.com>
	
	bfd/
	* archures.c: Add definition for bfd_mach_arm_iWMMXt2.
	* cpu-arm.c (processors): Add bfd_mach_arm_iWMMXt2.
	(arch_info_struct, bfd_arm_update_notes): Likewise.
	(architectures): Likewise.
	(bfd_arm_merge_machines): Check for iWMMXt2.
	* bfd-in2.h: Rebuild.
	
	gas/
	* config/tc-arm.c (enum operand_parse_code): New code OP_RIWR_I32z.
	(parse_operands): Handle OP_RIWR_I32z.
	(do_iwmmxt_wmerge): New function.
	(do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
	a register.
	(do_iwmmxt_wrwrwr_or_imm5): New function.
	(insns): Mark instructions as RIWR_I32z as appropriate.
	Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
	waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
	wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
	wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
	(md_begin): Handle IWMMXT2.
	(arm_cpus): Add iwmmxt2.
	(arm_extensions): Likewise.
	(arm_archs): Likewise.
	
	gas/testsuite/
	* gas/arm/iwmmxt2.s: New file.
	* gas/arm/iwmmxt2.d: New file.
	
	opcodes/
	* arm-dis.c (coprocessor_opcodes): The X-qualifier to WMADD may
	only be used with the default multiply-add operation, so if N is
	set, don't bother printing X.  Add new iwmmxt instructions.
	(IWMMXT_INSN_COUNT): Update.
	(iwmmxt_wwssnames): Qualify "wwss" names at index 2, 6, 10 and 14
	with a 'c' suffix.
	(print_insn_coprocessor): Check for iWMMXt2.  Handle format
	specifiers 'r', 'i'.

Patches:
http://sourceware.org/cgi-bin/cvsweb.cgi/src/bfd/archures.c.diff?cvsroot=src&only_with_tag=binutils-csl-2_17-branch&r1=1.116&r2=1.116.2.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/bfd/bfd-in2.h.diff?cvsroot=src&only_with_tag=binutils-csl-2_17-branch&r1=1.384.2.5&r2=1.384.2.6
http://sourceware.org/cgi-bin/cvsweb.cgi/src/bfd/cpu-arm.c.diff?cvsroot=src&only_with_tag=binutils-csl-2_17-branch&r1=1.20.2.1&r2=1.20.2.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/config/tc-arm.c.diff?cvsroot=src&only_with_tag=binutils-csl-2_17-branch&r1=1.250.2.36&r2=1.250.2.37
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/arm/iwmmxt2.d.diff?cvsroot=src&only_with_tag=binutils-csl-2_17-branch&r1=NONE&r2=1.1.2.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/arm/iwmmxt2.s.diff?cvsroot=src&only_with_tag=binutils-csl-2_17-branch&r1=NONE&r2=1.1.2.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/include/opcode/arm.h.diff?cvsroot=src&only_with_tag=binutils-csl-2_17-branch&r1=1.9.2.1&r2=1.9.2.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/arm-dis.c.diff?cvsroot=src&only_with_tag=binutils-csl-2_17-branch&r1=1.62.2.8&r2=1.62.2.9