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src/opcodes ChangeLog arm-dis.c
- From: jules at sourceware dot org
- To: binutils-cvs at sources dot redhat dot com
- Date: 26 Apr 2006 15:40:55 -0000
- Subject: src/opcodes ChangeLog arm-dis.c
CVSROOT: /cvs/src
Module name: src
Changes by: jules@sourceware.org 2006-04-26 15:40:55
Modified files:
opcodes : ChangeLog arm-dis.c
Log message:
* opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
%<code>[zy] into %[zy]<code>. Expand meaning of %<bitfield>['`?].
Add unified load/store instruction names.
(neon_opcode_table): New.
(arm_opcodes): Expand meaning of %<bitfield>['`?].
(arm_decode_bitfield): New.
(print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
(print_insn_neon): New.
(print_insn_arm): Adjust print_insn_coprocessor call. Call
print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
(print_insn_thumb32): Likewise.
Patches:
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/ChangeLog.diff?cvsroot=src&r1=1.928&r2=1.929
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/arm-dis.c.diff?cvsroot=src&r1=1.62&r2=1.63