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src bfd/ChangeLog bfd/archures.c bfd/bfd-in2.h ...
- From: nathan at sourceware dot org
- To: binutils-cvs at sources dot redhat dot com
- Date: 8 Nov 2005 11:15:13 -0000
- Subject: src bfd/ChangeLog bfd/archures.c bfd/bfd-in2.h ...
CVSROOT: /cvs/src
Module name: src
Changes by: nathan@sourceware.org 2005-11-08 11:15:13
Modified files:
bfd : ChangeLog archures.c bfd-in2.h cpu-ms1.c
elf32-ms1.c libbfd.h reloc.c
cpu : ChangeLog ms1.cpu ms1.opc
gas : ChangeLog
gas/config : tc-ms1.c
gas/doc : Makefile.am Makefile.in all.texi
gas/testsuite : ChangeLog
gas/testsuite/gas/ms1: allinsn.d errors.exp ms1-16-003.d
ms1-16-003.s ms1.exp relocs.d relocs.exp
include : ChangeLog
include/elf : ms1.h
opcodes : ChangeLog ms1-asm.c ms1-desc.c ms1-desc.h
ms1-dis.c ms1-ibld.c ms1-opc.c ms1-opc.h
Added files:
gas/doc : c-ms1.texi
gas/testsuite/gas/ms1: ms2.d ms2.s
Log message:
bfd:
Add ms2.
* archures.c (bfd_mach_ms2): Define.
* cpu-ms1.c (arch_info_struct): Add ms2 stanza.
* elf32-ms1.c (elf32_ms1_machine): Add ms2 case.
(ms1_elf_merge_private_bfd_data): Remove unused variables. Add
correct merging logic, with workaround.
(ms1_elf_print_private_bfd_data): Add ms2 case.
* reloc.c (BFD_RELOC_MS1_PCINSN8): Add ms2 specific reloc.
* libbfd.h: Regenerated.
* bfd-in2.h: Regenerated.
cpu:
Add ms2
* ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
model.
(f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
f-cb2incr, f-rc3): New fields.
(LOOP): New instruction.
(JAL-HAZARD): New hazard.
(imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
New operands.
(mul, muli, dbnz, iflush): Enable for ms2
(jal, reti): Has JAL-HAZARD.
(ldctxt, ldfb, stfb): Only ms1.
(fbcb): Only ms1,ms1-003.
(wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
fbcbincrs, mfbcbincrs): Enable for ms2.
(loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
* ms1.opc (parse_loopsize): New.
(parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
(print_pcrel): New.
gas:
Add ms2.
* config/tc-ms1.c (ms1_mach_bitmask): Initialize to MS1.
(ms1_architectures): Add ms2.
(md_parse_option): Add ms2.
(md_show_usage): Add ms2.
(md_assemble): Add JAL_HAZARD detection logic.
(md_cgen_lookup_reloc): Add MS1_OPERAND_LOOPSIZE case.
* doc/c-ms1.texi: New.
* doc/all.texi: Add MS1.
* doc/Makefile.am (CPU_DOCS): Add c-ms1.texi.
* doc/Makefile.in: Rebuilt.
* doc/Makefile: Rebuilt.
gas/testsuite:
Add ms2.
* gas/ms1/allinsn.d: Adjust pcrel disassembly.
* gas/ms1/errors.exp: Fix target triplet.
* gas/ms1/ms1-16-003.d: Adjust pcrel disassembly.
* gas/ms1/ms1-16-003.s: Tweak label.
* gas/ms1/ms1.exp: Adjust target triplet. Add ms2 test.
* gas/ms1/ms2.d, gas/ms1/ms2.s: New.
* gas/ms1/relocs.d: Adjust expected machine name and pcrel
disassembly.
* gas/ms1/relocs.exp: Adjust target triplet.
include:
Add ms2.
* elf/ms1.h (EF_MS1_CPU_MS2): New.
opcodes:
Add ms2.
* ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c,
ms1-opc.c, ms1-opc.h: Regenerated.
Patches:
http://sourceware.org/cgi-bin/cvsweb.cgi/src/bfd/ChangeLog.diff?cvsroot=src&r1=1.3344&r2=1.3345
http://sourceware.org/cgi-bin/cvsweb.cgi/src/bfd/archures.c.diff?cvsroot=src&r1=1.111&r2=1.112
http://sourceware.org/cgi-bin/cvsweb.cgi/src/bfd/bfd-in2.h.diff?cvsroot=src&r1=1.370&r2=1.371
http://sourceware.org/cgi-bin/cvsweb.cgi/src/bfd/cpu-ms1.c.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/bfd/elf32-ms1.c.diff?cvsroot=src&r1=1.2&r2=1.3
http://sourceware.org/cgi-bin/cvsweb.cgi/src/bfd/libbfd.h.diff?cvsroot=src&r1=1.163&r2=1.164
http://sourceware.org/cgi-bin/cvsweb.cgi/src/bfd/reloc.c.diff?cvsroot=src&r1=1.141&r2=1.142
http://sourceware.org/cgi-bin/cvsweb.cgi/src/cpu/ChangeLog.diff?cvsroot=src&r1=1.57&r2=1.58
http://sourceware.org/cgi-bin/cvsweb.cgi/src/cpu/ms1.cpu.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/cpu/ms1.opc.diff?cvsroot=src&r1=1.3&r2=1.4
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/ChangeLog.diff?cvsroot=src&r1=1.2732&r2=1.2733
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/config/tc-ms1.c.diff?cvsroot=src&r1=1.2&r2=1.3
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/doc/c-ms1.texi.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/doc/Makefile.am.diff?cvsroot=src&r1=1.38&r2=1.39
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/doc/Makefile.in.diff?cvsroot=src&r1=1.71&r2=1.72
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/doc/all.texi.diff?cvsroot=src&r1=1.23&r2=1.24
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/ChangeLog.diff?cvsroot=src&r1=1.945&r2=1.946
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/ms1/ms2.d.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/ms1/ms2.s.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/ms1/allinsn.d.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/ms1/errors.exp.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/ms1/ms1-16-003.d.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/ms1/ms1-16-003.s.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/ms1/ms1.exp.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/ms1/relocs.d.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/ms1/relocs.exp.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/include/ChangeLog.diff?cvsroot=src&r1=1.344&r2=1.345
http://sourceware.org/cgi-bin/cvsweb.cgi/src/include/elf/ms1.h.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/ChangeLog.diff?cvsroot=src&r1=1.869&r2=1.870
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/ms1-asm.c.diff?cvsroot=src&r1=1.3&r2=1.4
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/ms1-desc.c.diff?cvsroot=src&r1=1.3&r2=1.4
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/ms1-desc.h.diff?cvsroot=src&r1=1.2&r2=1.3
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/ms1-dis.c.diff?cvsroot=src&r1=1.4&r2=1.5
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/ms1-ibld.c.diff?cvsroot=src&r1=1.2&r2=1.3
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/ms1-opc.c.diff?cvsroot=src&r1=1.2&r2=1.3
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/ms1-opc.h.diff?cvsroot=src&r1=1.1&r2=1.2