Node:i386-Memory, Next:i386-Jumps, Previous:i386-Prefixes, Up:i386-Dependent
An Intel syntax indirect memory reference of the form
section:[base + index*scale + disp]
is translated into the AT&T syntax
section:disp(base, index, scale)
where base and index are the optional 32-bit base and
index registers, disp is the optional displacement, and
scale, taking the values 1, 2, 4, and 8, multiplies index
to calculate the address of the operand. If no scale is
specified, scale is taken to be 1. section specifies the
optional section register for the memory operand, and may override the
default section register (see a 80386 manual for section register
defaults). Note that section overrides in AT&T syntax must
be preceded by a %
. If you specify a section override which
coincides with the default section register, as
does not
output any section register override prefixes to assemble the given
instruction. Thus, section overrides can be specified to emphasize which
section register is used for a given memory operand.
Here are some examples of Intel and AT&T style memory references:
-4(%ebp)
, Intel: [ebp - 4]
%ebp
; disp is -4
. section is
missing, and the default section is used (%ss
for addressing with
%ebp
as the base register). index, scale are both missing.
foo(,%eax,4)
, Intel: [foo + eax*4]
%eax
(scaled by a scale 4); disp is
foo
. All other fields are missing. The section register here
defaults to %ds
.
foo(,1)
; Intel [foo]
foo
as a memory operand.
Note that base and index are both missing, but there is only
one ,
. This is a syntactic exception.
%gs:foo
; Intel gs:foo
foo
with section
register section being %gs
.
Absolute (as opposed to PC relative) call and jump operands must be
prefixed with *
. If no *
is specified, as
always chooses PC relative addressing for jump/call labels.
Any instruction that has a memory operand, but no register operand,
must specify its size (byte, word, long, or quadruple) with an
instruction mnemonic suffix (b
, w
, l
or q
,
respectively).
The x86-64 architecture adds an RIP (instruction pointer relative)
addressing. This addressing mode is specified by using rip
as a
base register. Only constant offsets are valid. For example:
1234(%rip)
, Intel: [rip + 1234]
symbol(%rip)
, Intel: [rip + symbol]
symbol
in RIP relative way, this is shorter than
the default absolute addressing.
Other addressing modes remain unchanged in x86-64 architecture, except registers used are 64-bit instead of 32-bit.